project.name

Navya sri

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

3:8 DECODER

3:8 DECODER
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FULL SUBSTRACTOR

FULL SUBSTRACTOR
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2 Bit synchronous down counter using JKf/f

2 Bit synchronous down counter using JKf/f
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7 segment display

7 segment display
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7 SEGMENT DISPLAY

7 SEGMENT DISPLAY
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7 SEGMENT DISPLAY

7 SEGMENT DISPLAY
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2 bit asynchronous down counter

2 bit asynchronous down counter
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2 bit asynchronous up counter

2 bit asynchronous up counter
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2 Bit synchronous up counter using JK f/f's

2 Bit synchronous up counter using JK f/f's
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HALF ADDER using NAND gates

HALF ADDER using NAND gates
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HALF SUBSTRACTOR

HALF SUBSTRACTOR
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HALF ADDER using NOR gates

HALF ADDER using NOR gates
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FULL SUBSTRACTOR using NOR gates

FULL SUBSTRACTOR using NOR gates
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FULL ADDER using NOR gates

FULL ADDER using NOR gates
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HALF SUBSTRACTOR using NOR gates

HALF SUBSTRACTOR using NOR gates
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4x1 MUX

4x1 MUX
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4X1 MUX

4X1 MUX
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8x1 MUX

8x1 MUX
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1X4 DMUX

1X4 DMUX
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1X8 DMUX

1X8 DMUX
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2:4 DECODER

2:4 DECODER
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4:2 ENCODER

4:2 ENCODER
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8:3 ENCODER

8:3 ENCODER
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7 segment display

7 segment display
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7 SEGMENT DISPLAY

7 SEGMENT DISPLAY
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FULL ADDER using NAND gates

FULL ADDER using NAND gates
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