Reshik.M
Member since: 4 months
Educational Institution: Not Entered
Country: Not Entered
DESGIN OD ADDER AND SUBTRACTOR CIRCUITS
DESGIN OD ADDER AND SUBTRACTOR CIRCUITS
2 BIT MAGNITUDE COMPARATOR USIN NAND GATE
2 BIT MAGNITUDE COMPARATOR USIN NAND GATE
2 BIT MAGNITUDE COMPARATOR
2 BIT MAGNITUDE COMPARATOR
1 BIT MAGNITUDE COMPATATOR USING BASIC AND NAND GATES
1 BIT MAGNITUDE COMPATATOR USING BASIC AND NAND GATES
DESGIN MULTIPLEXER AND DE MULTIPLEXER USING NAND GATES
DESGIN MULTIPLEXER AND DE MULTIPLEXER USING NAND GATES
verification of logic gates
verification of logic gates
VERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATES
LEVEL -1 IMPLEMENTATION AND VERIFICATION OF GATES USING 2X1 MULTIPLEXR
LEVEL -1 IMPLEMENTATION AND VERIFICATION OF GATES USING 2X1 MULTIPLEXR
Desgin of adder and subtractor circuts
Desgin of adder and subtractor circuts
VERIFICATIONS OF BOOLEAN LAWS
VERIFICATIONS OF BOOLEAN LAWS
DESIGN OF COMBINATIONAL CIRCUITS
DESIGN OF COMBINATIONAL CIRCUITS
DESGIN OF ADDER AND SUBTRACTOR CIRCUITS
DESGIN OF ADDER AND SUBTRACTOR CIRCUITS
Desgin of multiplexer and de multiplexer using basic gates
Desgin of multiplexer and de multiplexer using basic gates
LEVEL-1 IMPLEMENTATION AND VERIFICATION OF GATES USING 2X1 MULTIPLEXER
LEVEL-1 IMPLEMENTATION AND VERIFICATION OF GATES USING 2X1 MULTIPLEXER
LEVEL 2 DESIGN AND VERIFYB A FULL ADDER CIRCUIT USING 4X1 MULTIPLEXER
LEVEL 2 DESIGN AND VERIFYB A FULL ADDER CIRCUIT USING 4X1 MULTIPLEXER
circuit diagram of jk filp flop
circuit diagram of jk filp flop
exp -8
exp -8
Digital circuit Simulator online
Digital circuit Simulator online
