project.name

Girijashankar reddy

Member since: 5 months

Educational Institution: Not Entered

Country: Not Entered

verfication of logicgate

verfication of logicgate
Public
project.name
Fork View More

HALF ADDER

HALF ADDER
Public
project.name
Fork View More

girijashankar

girijashankar
Public
project.name
Fork View More

CIRCUIT VIRSE

CIRCUIT VIRSE
Public
project.name
Fork View More

CIRCUIT VIRSE

CIRCUIT VIRSE
Public
project.name
Fork View More

CIRCUIT VIRSE

CIRCUIT VIRSE
Public
project.name
Fork View More

CIRCUIT VIRSE

CIRCUIT VIRSE
Public
project.name
Fork View More

4TH MODULE

4TH MODULE
Public
project.name
Fork View More

HALF SUBTRACTOR

HALF SUBTRACTOR
Public
project.name
Fork View More

2:1 Multiplexer using nand gates

2:1 Multiplexer using nand gates
Public
project.name
Fork View More

1:2 DEMUX USING BASIC AND NAND GATES

1:2 DEMUX USING BASIC AND NAND GATES
Public
project.name
Fork View More

exp 7

exp 7
Public
project.name
Fork View More

experiment 7

experiment 7
Public
project.name
Fork View More

FULL HADDER

FULL HADDER
Public
project.name
Fork View More

1 BIT MAGINITNED COMPARATER

1 BIT MAGINITNED COMPARATER
Public
project.name
Fork View More

2 BIT MAGINITUDE COMPARATER USING ONLY NAND GATE

2 BIT MAGINITUDE COMPARATER USING ONLY NAND GATE
Public
project.name
Fork View More

2 bit comparator using basic gates

2 bit comparator using basic gates
Public
project.name
Fork View More
No result image
Girijashankar reddy doesn't have any favourites.
No result image
Girijashankar reddy is not a collaborator of any project.

Follow us on:

Facebook Logo Twitter Logo Linkedin Logo Youtube Logo Github Logo
Simulator
Learn
Blog
Examples
Log in
Documentation
Contribute
Teachers
About
Api
FAQ
Incubated From:

Copyright © 2025 CircuitVerse, All rights reserved.