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Author: Dinesh Shah
Project access type: Public
Description:
A Half-Adder is a type of combinational logic circuit
formed by connecting an XOR gate and an AND gate. It takes two binary inputs, A
and B, and computes their sum and carry.
The XOR gate output represents the sum of the binary digits, while the AND gate
output represents the carry. This arrangement enables the Half-Adder to perform
basic binary addition operations. The Boolean functions for the circuit are
expressed below:
Sum = A ⊕ B
Carry = A . B
Created: Apr 03, 2024
Updated: Apr 03, 2024
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