project.name

Adithi.K

Member since: 10 months

Educational Institution: Not Entered

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Half Subtractor

Half Subtractor
Public
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Full Subtractor

Full Subtractor
Public
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2-Bit Comparator

2-Bit Comparator
Public
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Half Adder

Half Adder
Public
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Full Adder

Full Adder
Public
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1-Bit Magnitude Comparator

1-Bit Magnitude Comparator
Public
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2*1 MULTIPLEXER

2*1 MULTIPLEXER
Public
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Full adder using 4*1 Multiplexer

Full adder using 4*1 Multiplexer
Public
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3-bit up and down counter jk flip flop

3-bit up and down counter jk flip flop
Public
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3-bit up and down counter jk flip flop

3-bit up and down counter jk flip flop
Public
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Implementation and verification of J-K fil-flop using NAND gates

Implementation and verification of J-K fil-flop using NAND gates
Public
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