This is a simple Arithmetical Logical Unit (ALU). The ALU has 4 registers that can be used for computations and 4 bit wide status register.

About the registers:

• Registers are denoted %0, %1, %2, %3.
• Each register is 8 bit wide.
• Register %0 is the a zero-register and its bits are always zero.
• The status register gets updated after a add-/sub-operation (see below).

Instructions are 8 bit wide. If you read the bits from left to right and group the bits in pairs the instruction format Op, X, Y, Z. For example, the instruction is "00 01 10 11" the Op=00, X=01, Y=10, Z=11.

• Op denotes the bits that represent the operation code,
• X, Y, Z are used to denote operands.

The ALU support the following operations:

• Op = 00 loads the 4 bits XY into the lower bits of %Z
• Op = 01 loads the 4 bits XY into the upper bits of %Z
• Op = 10 is an add operation for %X + %Y -> %Z (i.e. it adds %X and %Y and stores the result in %Z)
• Op = 11 is a sub operation for %Y - %X -> %Z (i.e. it subtracts %X from %Y and stored the result in %Z).

The status register gets updated after an instruction with Opcode 10 or 11 (i.e. after adding or subtracting registers).