project.name

veeresh

Member since: 9 months

Educational Institution: presidency university

Country: India

HALF adder and FULL adeer

HALF adder and FULL adeer
Public
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rcrc

rcrc
Public
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FULL SUBTRACTOR USING BASIC GATES

FULL SUBTRACTOR USING BASIC GATES
Public
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full adder using nand gate

full adder using nand gate
Public
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full using NANDGATE

full using NANDGATE
Public
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multiplexers

multiplexers
Public
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comparators

comparators
Public
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Implementatuion of basic gates using MUX

Implementatuion of basic gates using MUX
Public
project.name
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