BASIC GATES

AND GATE

OR GATE

NOT GATE

NAND GATE

NOR GATE

NOT GATE USING NAND GATE

EXOR GATE

EX-NOR GATE

AND GATE USING NAND GATE

NOT GATE USING NOR GATE

OR GATE USING NAND GATE

AND GATE USING NOR GATE

EXOR GATE USING NAND GATE

HALF-ADDER USING BASIC GATES

HALF-SUBTRACTOR USING BASIC GATES

HALF-SUBTRACTOR USING NAND GATE

1*2 DE-MUTLIPLEXER USING BASIC GATES

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IDEMPOTENT LAW

COMPLEMENT LAW

OR GATE BY NOR GATE

EX-NOR USING NAND GATE

ANNULMENT LAW

COMMUTATIVE LAW

ASSOCIATIVE LAW

DISTRIBUTIVE LAW

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1-BIT MAGNITUDE COMPARATOR USING BASIC GATES

2-BIT MAGNITUDE USING NAND GATES

ABSORPTION LAW

DEMORGAN'S LAW

HALF-ADDER USING NAND GATE

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EXP-3 (LEVEL-1)

EXP-3(LEVEL-2)

HALF-ADDER USING BASIC GATES

FULL-SUBTRACTOR USING NAND GATE

FULL-SUBTRACTOR USING BASIC GATE

FULL-ADDER USING NAND GATE

FULL ADDER USING BASIC GATES

1-BIT MAGNITUDE USING NAND GATES

2-BIT MAGNITUDE USING BASIC GATES

IMPLEMENTATION OF OR GATE

IMPLEMENTATION OF NOT GATE

IMPLEMENTATION OF AND GATE

IMPLEMENTATION OF XNOR GATE

IMPLEMENTATION OF XOR GATE

IMPLEMENTATION OF NAND GATE

IMPLEMENTATION OF NOR GATE

2*1 MUTLIPLEXER USING BASIC GATES

2*1 MUTLIPLEXER USING NAND GATES

1*2 DE-MUTLIPLEXER USING NAND GATE

FULL-ADDER CIRCUIT USING 4*1 MUTLIPLEXER

CIRCUIT DIAGRAM OF JK FLIP-FLOP

IDENTITY LAW

1*2 DE-MULTIPLEXER USING BASIC GATES

EX-NOR GATE USING NOR GATE