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vikas gj

Member since: 4 months

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JK FLIPFLOP

JK FLIPFLOP
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Verification of logic gates - 1

Verification of logic gates - 1
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Untitled

Untitled
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Untitled

Untitled
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EXPERIMENT-3

EXPERIMENT-3
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BOOLEAN LAWS

BOOLEAN LAWS
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BOOLEAN LAWS

BOOLEAN LAWS
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Design of HALF-ADDER

Design of HALF-ADDER
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exp2

exp2
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Untitled

Untitled
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2-BIT COMPARATOR

2-BIT COMPARATOR
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FULL SUBTRACTOR

FULL SUBTRACTOR
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FULL ADDER DESIGN

FULL ADDER DESIGN
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1x2 DE-MULTIPLEXER

1x2 DE-MULTIPLEXER
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2X1 MULTIPLEXER

2X1 MULTIPLEXER
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1-BIT COMPARATOR

1-BIT COMPARATOR
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J-k Flipflop

J-k Flipflop
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