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shreya

Member since: 3 months

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Half subtractor using basic and NAND gate

Half subtractor using basic and NAND gate
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LOGIC GATES

LOGIC GATES
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EXP 4;half adder inplementation using basic gates

EXP 4;half adder inplementation using basic gates
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EXP 4;half adder implementation using only NAND gate

EXP 4;half adder implementation using only NAND gate
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EXP4;full adder implementation using only NAND gate

EXP4;full adder implementation using only NAND gate
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EXP4;full adder implementation using basic gates

EXP4;full adder implementation using basic gates
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exp 3 level 2

exp 3 level 2
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DISTRIBUTIVE LAW

DISTRIBUTIVE LAW
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EXPT:5--1

EXPT:5--1
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FULL SUBTRACTOR USING BASIC GATES

FULL SUBTRACTOR USING BASIC GATES
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FULL SABTRACTOR USING ONLY NAND GATE

FULL SABTRACTOR USING ONLY NAND GATE
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2 BIT MULTIPLEXER

2 BIT MULTIPLEXER
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4x1 n 2x1 multiplexer

4x1 n 2x1 multiplexer
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2X1 multiplexer n 1x2 demultiplexer using basic gates

2X1 multiplexer n 1x2 demultiplexer using basic gates
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2x1 mux using NAND gate

2x1 mux using NAND gate
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2x4 DECODER

2x4 DECODER
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4x2 ENCODER

4x2 ENCODER
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FULL ADDER USING MULTIPLEXER

FULL ADDER USING MULTIPLEXER
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