Member since: 10 months
Educational Institution: PRESIDENCY UNIVERSITY , BANGALORE
Country: India
NAND GATES
NAND GATESNOR GATES
NOR GATESFULL ADDER
FULL ADDERHALF ADDER
HALF ADDERExperiment - 1
Experiment - 1Untitled
Untitlednand
nandEXPT - 3 LEVEL - 1
EXPT - 3 LEVEL - 1Untitled
Untitled2-bit comparator using NAND
2-bit comparator using NANDUntitled
UntitledUntitled
Untitled2 bit comparator
2 bit comparatorFULL SUBTRACTOR
FULL SUBTRACTORHALF SUBTRACTOR
HALF SUBTRACTOR1 bit comparator
1 bit comparator2-bit comparator using NAND
2-bit comparator using NANDIMPLEMENTATION OF BASIC GATES USING 2:1 MUX
IMPLEMENTATION OF BASIC GATES USING 2:1 MUXDesign a 3-bit synchronous MOD-3 counter using JK - f/f
Design a 3-bit synchronous MOD-3 counter using JK - f/fJK Flip Flop using NAND Gate
JK Flip Flop using NAND Gate