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Untitled
Untitled2nd experiment
2nd experimentJK PLIP FLOP
JK PLIP FLOPBLOCK DIAGRAM OF JK FLIP FLOP
BLOCK DIAGRAM OF JK FLIP FLOPlogic gates
logic gatesnand realisation
nand realisationimplementation of logic gates using NOR gates
implementation of logic gates using NOR gatesimplementation of logic gates using NAND gates
implementation of logic gates using NAND gates1-BIT COMPARATOR
1-BIT COMPARATOR2-BIT COMPARATOR
2-BIT COMPARATORUntitled
UntitledUntitled
UntitledEXP 7 LVL 1
EXP 7 LVL 1EXP07 LEVEL01
EXP07 LEVEL01EXP 7 LEVL 2
EXP 7 LEVL 2EXP 8 LVL 1
EXP 8 LVL 1Untitled
UntitledEXP 8
EXP 8Untitled
UntitledBLOCK DIAGRAM OF FLIP FLOPS
BLOCK DIAGRAM OF FLIP FLOPSUntitled
Untitledverification of logic gates
verification of logic gates