Nandana
Member since: 1 year
Educational Institution: Not Entered
Country: Not Entered
UNIVERSAL GATES
UNIVERSAL GATES
Public
BASIC GATES
BASIC GATES
Public
verification of boolean laws
verification of boolean laws
Public
BINARY ADDITION
BINARY ADDITION
Public
OTHER LOGIC GATES
OTHER LOGIC GATES
Public
HALF ADDER CIRCUIT WITH NAND IMPLEMENTATION
HALF ADDER CIRCUIT WITH NAND IMPLEMENTATION
Public
FULL ADDER CIRCIUT WITH NAND IMPLEMENTATION
FULL ADDER CIRCIUT WITH NAND IMPLEMENTATION
Public
EXP 3level 1
EXP 3level 1
Public
EXP 3 LEVEL 2
EXP 3 LEVEL 2
Public
2:1 MUX USING BASIC GATES
2:1 MUX USING BASIC GATES
Public
OTHER GATES USING 2:1 MUX
OTHER GATES USING 2:1 MUX
Public
EXP 5
EXP 5
Public
HALF SUBTRACTOR WITH NAND IMPLEMENTATION
HALF SUBTRACTOR WITH NAND IMPLEMENTATION
Public
FULL SUBTRACTOR
FULL SUBTRACTOR
Public
DISTRIBUTIVE LAW
DISTRIBUTIVE LAW
Public
2:1 MUX USING NAND GATES
2:1 MUX USING NAND GATES
Public
EXP 7
EXP 7
Public
QUESTION USING 4:1 MUX IMPLEMENTATION
QUESTION USING 4:1 MUX IMPLEMENTATION
Public
BUTTERFLY MAN
BUTTERFLY MAN
Public
QUESTION USING 8 1 MUX
QUESTION USING 8 1 MUX
Public
QUESTION USING 2 1 MUX
QUESTION USING 2 1 MUX
Public
exp 8
exp 8
Public
