DEEPAK
Member since: 4 months
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Ex-3(Full Adder)
Ex-3(Full Adder)
Public
Ex-3(Half adder)
Ex-3(Half adder)
Public
Untitled
Untitled
Public
Ex -4(Half subtractor)
Ex -4(Half subtractor)
Public
IMPLEMENTATION OF ALL GATES USING [ 2:1 MUX ]
IMPLEMENTATION OF ALL GATES USING [ 2:1 MUX ]
Public
EXP-4(FULL SUBSTRACTOR)
EXP-4(FULL SUBSTRACTOR)
Public
EXP-4 FULL ADDER
EXP-4 FULL ADDER
Public
EXP-4,HALF ADDER
EXP-4,HALF ADDER
Public
Untitled
Untitled
Public
Ex-3(Full Subtractor)
Ex-3(Full Subtractor)
Public
Ex-4(1 bit magnitude comparator)
Ex-4(1 bit magnitude comparator)
Public
Ex-5[level 2(A>B)]
Ex-5[level 2(A>B)]
Public
Ex-5[level 2(A=B)]
Ex-5[level 2(A=B)]
Public
0334
0334
Public
2:1 & 1:2
2:1 & 1:2
Public
2:1 mux and 1:2 d mux
2:1 mux and 1:2 d mux
Public
IMPLEMENTATION OF ALL GATES USING [ 2:1 MUX ]
IMPLEMENTATION OF ALL GATES USING [ 2:1 MUX ]
Public
FULL ADDER CIRCUIT USING 4:1 MULTIPLEXER
FULL ADDER CIRCUIT USING 4:1 MULTIPLEXER
Public
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