Member since: 10 months
Educational Institution: Presidency University
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Untitledexperiment 1
experiment 1EXPT 2
EXPT 2EXPT 6 LEVEL 2
EXPT 6 LEVEL 2EXPT 03
EXPT 03expt 2
expt 2Untitled
UntitledU G M
U G MEXPT 3 LEVEL 2
EXPT 3 LEVEL 2BASIC GATES
BASIC GATESEXPT 4 FULL ADDER USING BASIC GATES
EXPT 4 FULL ADDER USING BASIC GATESExpt 4 Full adder using only NAND gate
Expt 4 Full adder using only NAND gateFull subtractor using NAND gate
Full subtractor using NAND gateUntitled
UntitledEXPT 2
EXPT 2EXPT 5 LEVEL 2 USING BASIC GATE
EXPT 5 LEVEL 2 USING BASIC GATEEXPT 5 LEVEL 2
EXPT 5 LEVEL 2EXPT 5 (A<b></b>
EXPT 5 (A<b></b>EXPT 5 LEVEL 2 (A>B USING ONLY NAND GATE)
EXPT 5 LEVEL 2 (A>B USING ONLY NAND GATE)EXPT 7 LEVEL 2
EXPT 7 LEVEL 2EXPT 5 LEVEL 1
EXPT 5 LEVEL 1Untitled
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UntitledEXPT 6 LEVEL 2
EXPT 6 LEVEL 2