project.name

Sandhya G

Member since: 10 months

Educational Institution: Not Entered

Country: Not Entered

NOR GATE TO BASIC GATE

NOR GATE TO BASIC GATE
Public
project.name

BASIC GATES ALL

BASIC GATES ALL
Public
project.name

Untitled

Untitled
Public
project.name

DEMORGAN LAW

DEMORGAN LAW
Public
project.name

1BIT

1BIT
Public
project.name

BASIC GATES.

BASIC GATES.
Public
project.name

2BIT

2BIT
Public
project.name

BIT ADDER AND SUBTRACTOR

BIT ADDER AND SUBTRACTOR
Public
project.name

HALF ADDER

HALF ADDER
Public
project.name

BASIC GATES USING UNIVERSAL GATES

BASIC GATES USING UNIVERSAL GATES
Public
project.name

experiment 3

experiment 3
Public
project.name

EXPERIMENT 3

EXPERIMENT 3
Public
project.name

LEVEL 2

LEVEL 2
Public
project.name

multiplexer using NAND

multiplexer using NAND
Public
project.name

3VARIABLE

3VARIABLE
Public
project.name

HALF ADDER HALF SUBTRACTOR USING NAND GATE

HALF ADDER HALF SUBTRACTOR USING NAND GATE
Public
project.name

HALF AND FULL ADDER

HALF AND FULL ADDER
Public
project.name

Untitled

Untitled
Public
project.name

full adder using nand gate

full adder using nand gate
Public
project.name

UNIVERSAL GATES

UNIVERSAL GATES
Public
project.name

BASIC GATES.

BASIC GATES.
Public
project.name

Untitled

Untitled
Public
project.name

BASIC GATES ALL

BASIC GATES ALL
Public
project.name

Experiment 6

Experiment 6
Public
project.name

8

8
Public
project.name

EXP7

EXP7
Public
project.name

P8

P8
Public
project.name
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