project.name

Tejas Jondhale

Member since: 1 year

Educational Institution: PRESIDENCY UNIVERSITY , BANGALORE

Country: India

6th experiment

6th experiment
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experiment 4 design of adder and subtractor

experiment 4 design of adder and subtractor
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EXP 1 LEVEL 2

EXP 1 LEVEL 2
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exp 1 lvl 2 (1)

exp 1 lvl 2 (1)
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Verification of boolean laws

Verification of boolean laws
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Verification of boolean laws 2

Verification of boolean laws 2
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Untitled

Untitled
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full adder and subtractor adder using nand gate only

full adder and subtractor adder using nand gate only
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Untitled

Untitled
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half sub using basic gates and nand gate

half sub using basic gates and nand gate
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half adder using only nand gates

half adder using only nand gates
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5th experiment

5th experiment
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Untitled

Untitled
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Untitled

Untitled
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Untitled

Untitled
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experiment 4 design of adder and subtractor

experiment 4 design of adder and subtractor
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exp 8

exp 8
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EXPERIMENT 7

EXPERIMENT 7
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5th

5th
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8th exp

8th exp
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5th exp

5th exp
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exp 5

exp 5
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