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Author: Kushal
Project access type: Public
Description:
It is implemented using a mod 3 counter with 50 percent duty cycle,then it is inverted to obtain X,then it ~X is passed through two D FF to obtain 1 cycle delay and X is passed through a single DFF to obtain half cycle delay and the AND of these two give Y
Created: Jan 28, 2024
Updated: Feb 06, 2024
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