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Amandeep Singh Pathania

Member since: 10 months

Educational Institution: National Institute of Technology Hamirpur

Country: India

Half subtractor using NAND gate.

Half subtractor using NAND gate.
Public
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Full subtractor using Nor gate

Full subtractor using Nor gate
Public
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4 bit ripple carry adder

4 bit ripple carry adder
Public
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Full adder using nand gate

Full adder using nand gate
Public
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alu circuit for and,xor,or,add

alu circuit for and,xor,or,add
Public
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Half adder using NAND gate

Half adder using NAND gate
Public
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Demorgan law

Demorgan law
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binary to grey conversion

binary to grey conversion
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2 bit grey to binary conversion

2 bit grey to binary conversion
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SR flip flop

SR flip flop
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JK flip flop

JK flip flop
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D flip flop

D flip flop
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Half adder using NOR gate

Half adder using NOR gate
Public
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T flip flop

T flip flop
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Half subtractor using NOR gate.

Half subtractor using NOR gate.
Public
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Full adder using NOR gate.

Full adder using NOR gate.
Public
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5 bit synchronous binary counter

5 bit synchronous binary counter
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practical 1

practical 1
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Untitled

Untitled
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Full subtractor using Nand gate

Full subtractor using Nand gate
Public
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