Amandeep Singh Pathania
Member since: 3 months
Educational Institution: National Institute of Technology Hamirpur
Country: India
Half subtractor using NAND gate.
Half subtractor using NAND gate.
Public
Full subtractor using Nor gate
Full subtractor using Nor gate
Public
4 bit ripple carry adder
4 bit ripple carry adder
Public
Full adder using nand gate
Full adder using nand gate
Public
Full subtractor using Nand gate
Full subtractor using Nand gate
Public
alu circuit for and,xor,or,add
alu circuit for and,xor,or,add
Public
Half adder using NAND gate
Half adder using NAND gate
Public
Demorgan law
Demorgan law
Public
binary to grey conversion
binary to grey conversion
Public
2 bit grey to binary conversion
2 bit grey to binary conversion
Public
SR flip flop
SR flip flop
Public
JK flip flop
JK flip flop
Public
D flip flop
D flip flop
Public
Half adder using NOR gate
Half adder using NOR gate
Public
T flip flop
T flip flop
Public
Half subtractor using NOR gate.
Half subtractor using NOR gate.
Public
Full adder using NOR gate.
Full adder using NOR gate.
Public
5 bit synchronous binary counter
5 bit synchronous binary counter
Public
practical 1
practical 1
Public
Untitled
Untitled
Public
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