Abhijeet Kumar
Member since: 9 months
Educational Institution: Not Entered
Country: Not Entered
P4:a (FULL ADDER USING NAND GATES)
P4:a (FULL ADDER USING NAND GATES)
Public
P6:a (FULL SUBTRACTOR USING NAND)
P6:a (FULL SUBTRACTOR USING NAND)
Public
P6:b (FULL SUBTRACTOR USING NOR GATES)
P6:b (FULL SUBTRACTOR USING NOR GATES)
Public
P3: (FLIP FLOPS)
P3: (FLIP FLOPS)
Public
P7: 4 bit Ripple Carry Adder
P7: 4 bit Ripple Carry Adder
Public
p1:b (half adder using nand gates)
p1:b (half adder using nand gates)
Public
P1:a (de Morgan's laws)
P1:a (de Morgan's laws)
Public
P1:d (4 bit binary to gray code converter)
P1:d (4 bit binary to gray code converter)
Public
P1:e (2 bit gray to binary code converter)
P1:e (2 bit gray to binary code converter)
Public
P1:c (half adder using nor gates)
P1:c (half adder using nor gates)
Public
P2: 4 BIT ALU
P2: 4 BIT ALU
Public
P5:b (HALF SUBTRACTOR USING NOR GATES)
P5:b (HALF SUBTRACTOR USING NOR GATES)
Public
P4:b (FULL ADDER USING NOR GATES)
P4:b (FULL ADDER USING NOR GATES)
Public
P5:a (HALF SUBTRACTOR USING NAND GATES)
P5:a (HALF SUBTRACTOR USING NAND GATES)
Public
P9:b Three 4-bit Wallace tree Adder
P9:b Three 4-bit Wallace tree Adder
Public
P9:a 4 bit carry lookahead adder
P9:a 4 bit carry lookahead adder
Public
P8:c 5-bit synchronous Johnson counter
P8:c 5-bit synchronous Johnson counter
Public
P8:a 5-bit synchronous binary counter
P8:a 5-bit synchronous binary counter
Public
P8:b 5-bit synchronous Ring Counter
P8:b 5-bit synchronous Ring Counter
Public
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