VEERESH MANVACHAR "20231CSE3088" - Circuits

VEERESH MANVACHAR "20231CSE3088"

Member since: 5 months

Educational Institution: Presidency University, Bangalore, Itagalpura, Rajankunte ,Yelahanka

Country: India

Not Gate

Not Gate

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NOR Gate

NOR Gate

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AND Gate

AND Gate

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OR Gate

OR Gate

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EXOR Gate

EXOR Gate

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EX - NOR Gate

EX - NOR Gate

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NAND GATE

NAND GATE

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FULL SUBTRACTOR

FULL SUBTRACTOR

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Realization of 4:1 MUX using Basic and XOR Gate

Realization of 4:1 MUX using Basic and XOR Gate

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2:1 MUX

2:1 MUX

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1:2 DEMUX

1:2 DEMUX

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1:4 DE-MULTIPLEXER

1:4 DE-MULTIPLEXER

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2:1 MUX

2:1 MUX

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4 : 1 MUX

4 : 1 MUX

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2 TO 4 DECODER

2 TO 4 DECODER

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2 : 1 DEMUX USING NAND

2 : 1 DEMUX USING NAND

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4 : 1 MUX USING NAND

4 : 1 MUX USING NAND

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veeresh vm

veeresh vm

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Untitled

Untitled

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2 bit half adder

2 bit half adder

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Full Subtractor

Full Subtractor

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half sub

half sub

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parallel adder

parallel adder

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parallel sub

parallel sub

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4 BIT SYNCHRONOUS UP COUNTER

4 BIT SYNCHRONOUS UP COUNTER

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FULL ADDER USING NAND GATE ONLY

FULL ADDER USING NAND GATE ONLY

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Untitled

Untitled

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FULL ADDER CIRCUTE

FULL ADDER CIRCUTE

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2:1 MUX

2:1 MUX

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1:2 DEMUX

1:2 DEMUX

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4:2 Priority Encoder

4:2 Priority Encoder

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4:2 Encoder

4:2 Encoder

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2:4 decoder

2:4 decoder

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4 to2 priority encoder

4 to2 priority encoder

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Full Adder

Full Adder

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Untitled

Untitled

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2-BIT HALF ADDER USING NAND GATE ONLY

2-BIT HALF ADDER USING NAND GATE ONLY

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Design of Logic Diagram using Basic Gates on Online Simulator

Design of Logic Diagram using Basic Gates on Online Simulator

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Untitled

Untitled

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Design of Logic Diagram using NAND Gates

Design of Logic Diagram using NAND Gates

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JK Flipflop implementation using nand gate

JK Flipflop implementation using nand gate

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Basic Gate realisation of 1,2 MUX

Basic Gate realisation of 1,2 MUX

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Realization of 4:1 mux using Basic gates and XOR gate

Realization of 4:1 mux using Basic gates and XOR gate

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D FlipFlop

D FlipFlop

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T FlipFLOP

T FlipFLOP

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D To JK FlipFlop

D To JK FlipFlop

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SR FlipFLop

SR FlipFLop

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JK FlipFlop

JK FlipFlop

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JK TO D FlipFlop conversion

JK TO D FlipFlop conversion

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3 BIT SYNCHRONOUS UP/DOWN COUNTER

3 BIT SYNCHRONOUS UP/DOWN COUNTER

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3 Bit Asynchronous Binary down counter

3 Bit Asynchronous Binary down counter

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3 BIT ASYNCHRONOUS BINARY UP COUNTER

3 BIT ASYNCHRONOUS BINARY UP COUNTER

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4 BIT SYNCHRONOUS UP COUNTER

4 BIT SYNCHRONOUS UP COUNTER

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HALF SUBTRACTOR USING NAND GATE ONLY

HALF SUBTRACTOR USING NAND GATE ONLY

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VEERESH MANVACHAR "20231CSE3088" is not a collaborator of any project.