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Mohammed Affan M

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Verification Of Logic Gates (Level 1)

Verification Of Logic Gates (Level 1)
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Verification Of Logic Gates (Level 2)

Verification Of Logic Gates (Level 2)
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EXP 2

EXP 2
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EXP 3

EXP 3
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Half Adder AND Full Adder

Half Adder AND Full Adder
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Half Subtractor AND Full Subtractor

Half Subtractor AND Full Subtractor
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1 BIT MAGNITUDE COMPARTOR

1 BIT MAGNITUDE COMPARTOR
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2 bit comparator using basic gates

2 bit comparator using basic gates
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2-BIT MAGNITUDE COMPARATOR USING NAND GATE

2-BIT MAGNITUDE COMPARATOR USING NAND GATE
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1:2 DEMUX USING BASIC AND NAND GATES

1:2 DEMUX USING BASIC AND NAND GATES
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Exp 7. Design Of Circuits Using Multiplexer

Exp 7. Design Of Circuits Using Multiplexer
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Experiment-8:Study of Flip-Flop

Experiment-8:Study of Flip-Flop
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