XOR using NAND gate

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exp 1

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full adder using 3 to 8 decoder

NAND IMPLEMENTATION

combinational circuit

Engine running

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Exp 4

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Exp 3

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Exp 2

4 bit decimal code

4 BIT-BINARY Code using NAND

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Full Adder n Subtractor

Magnitude Comparator

Half adder and Subtractor

16:1 multiplexor

(2)8:1 multiplexor

Full adder and Subtractor implementation using 3 to 8 Decoder(exp 4)

Basic Gates using 2:1 MUX

Implement Half Adder and Subtractor using 2 to 4 decoder

flip flop