Member since: 1 year
Educational Institution: Presidency University, Bangalore, Itagalpura, Rajankunte ,Yelahanka
Country: India
HALF and FULL ADDER using BASIC GATES
HALF and FULL ADDER using BASIC GATESHALF AND FULL SUBTRACTOR USING BASIC GATES
HALF AND FULL SUBTRACTOR USING BASIC GATESBasic gate (C)
Basic gate (C)Basic gates(A)
Basic gates(A)Basic gates(B)
Basic gates(B)Basic gates(D)
Basic gates(D)IMPLEMENTATION OF NOR GATE
IMPLEMENTATION OF NOR GATEIMPLEMENTATION OF AND GATE
IMPLEMENTATION OF AND GATEDISTRIBUTIVE LAW
DISTRIBUTIVE LAWHALF AND FULL ADDER USING NAND GATES
HALF AND FULL ADDER USING NAND GATESLevel 1 and LEVEL 2
Level 1 and LEVEL 2EXP.2
EXP.2EXPR(2)
EXPR(2)EXPRN(2)
EXPRN(2)MUX and DE-MUX
MUX and DE-MUXHalf and Full Subtractor using NAND Gates
Half and Full Subtractor using NAND Gates2-BIT COMPORATOR USING NAND GATE
2-BIT COMPORATOR USING NAND GATE2-BIT COMPARATOR USING LOGIC GATES
2-BIT COMPARATOR USING LOGIC GATES1 AND 2 BIT COMPARATOR USING BASIC AND NAND GATES
1 AND 2 BIT COMPARATOR USING BASIC AND NAND GATES4x2 ENCODER and 2x4 DECODER
4x2 ENCODER and 2x4 DECODERECE
ECEMUX AND DEMUX USING BASIC AND NAND GATES
MUX AND DEMUX USING BASIC AND NAND GATES2:1 MUX
2:1 MUXSEQUINTIAL CIRCUIT
SEQUINTIAL CIRCUIT2:1 MUX
2:1 MUXUntitled
Untitled4X1 MULTIPLEXER
4X1 MULTIPLEXER