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basic gates
basic gatesEXP-4 2 AND 3 BIT ADDEER AND SUBTRACTER
EXP-4 2 AND 3 BIT ADDEER AND SUBTRACTEREXP 7 LEVEL 2
EXP 7 LEVEL 2EXP-05 -1-BIT ADDER
EXP-05 -1-BIT ADDERexp-03
exp-03EXP-4 LEVEL 2
EXP-4 LEVEL 2VERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATESSONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIML
SONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIMLSONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIML
SONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIMLUniversal gates
Universal gatesVERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATESREALISATION OF BASIC GATES USING NAND GATE
REALISATION OF BASIC GATES USING NAND GATEVERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATESREALIZATION OF BASIC GATES USING NOR GATE
REALIZATION OF BASIC GATES USING NOR GATEVERIFICATION OF LOGIC GATES
VERIFICATION OF LOGIC GATESEXP -3 DESIGNB OF COMBINATION CIRCUITS
EXP -3 DESIGNB OF COMBINATION CIRCUITSEXP-05 DESIGN OF MAGNITUDE COMPARATOR
EXP-05 DESIGN OF MAGNITUDE COMPARATORVERIFICATION OF BOOLEAN LAW
VERIFICATION OF BOOLEAN LAWVerification of Boolean Laws
Verification of Boolean LawsVERIFICATION OF BOOLEAN LAW
VERIFICATION OF BOOLEAN LAWEXP-3 BOOLEAN ALGEBRA
EXP-3 BOOLEAN ALGEBRAEXP-05
EXP-05EXP-05 LEVEL 2
EXP-05 LEVEL 2EXP-5 DESIGN OF MAGNITUDE
EXP-5 DESIGN OF MAGNITUDEexp 5
exp 5EXP-06 LEVEL 1 DE MUX
EXP-06 LEVEL 1 DE MUXexp 6 multiplexer and de-multiplexer
exp 6 multiplexer and de-multiplexerEXP-4 LEVEL 2
EXP-4 LEVEL 2EXP 6 LEVEL 2 MULTIPLEXER USING NAND GATE
EXP 6 LEVEL 2 MULTIPLEXER USING NAND GATEEXP 6 LEVEL 2 DEMULTIPLEXER USING NAND GATE
EXP 6 LEVEL 2 DEMULTIPLEXER USING NAND GATEEXP 6 LEVEL 2 MULTIPLEXER USING NAND GATE
EXP 6 LEVEL 2 MULTIPLEXER USING NAND GATEEXP 6 LEVEL 2 MULTIPLEXER USING NAND GATE
EXP 6 LEVEL 2 MULTIPLEXER USING NAND GATEUntitled
UntitledEXP 8
EXP 8EXP 8 LEVEL 1
EXP 8 LEVEL 1VERIFICATION OF BOOLEAN LAWS
VERIFICATION OF BOOLEAN LAWSSONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIML
SONALI CHOWDARY.K (20231CAI0029),BES11,CSE-AIML