Member since: 10 months
Educational Institution: presidency university
Country: India
Exp1Lev2
Exp1Lev2Exp1Lev2
Exp1Lev2Exp1Lev2
Exp1Lev2REALIZATION OF 4:1 MUX
REALIZATION OF 4:1 MUXEXP-7
EXP-7exp 4 Level 2
exp 4 Level 2expt 5 level 2
expt 5 level 2exp 5
exp 5Untitled
Untitledfull adder o
full adder oexp1 level 1
exp1 level 1Untitled
UntitledUntitled
UntitledFull Subtractor using NAND gate
Full Subtractor using NAND gateexppp2
exppp2expt 3 demux
expt 3 demuxFull Subtractor using 2 Half Subtractor
Full Subtractor using 2 Half SubtractorEXPT 4 LEVEL 1
EXPT 4 LEVEL 1expt 3 mux
expt 3 muxexp6 level 1 and 2
exp6 level 1 and 2exp6 level 1 and 2
exp6 level 1 and 2Full Subtractor using basic gates
Full Subtractor using basic gatesExp1Lev2
Exp1Lev2