project.name

Rohith S L

Member since: 1 year

Educational Institution: Presidency University, Bangalore

Country: India

Half Adder

Half Adder
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4:2 Priority Encoder

4:2 Priority Encoder
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Full Subtractor

Full Subtractor
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project.name
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NOR Implementation

NOR Implementation
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8:3 Encoder

8:3 Encoder
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4:2 Encoder

4:2 Encoder
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2:1 MUX

2:1 MUX
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FlipFlops

FlipFlops
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Half Subtractor

Half Subtractor
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1-Bit Comparator

1-Bit Comparator
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8:1 MUX

8:1 MUX
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1:2 DeMUX

1:2 DeMUX
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NAND Implementation

NAND Implementation
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2-Bit Comparator

2-Bit Comparator
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1:4 DeMUX

1:4 DeMUX
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Full Adder

Full Adder
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project.name
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4:1 MUX

4:1 MUX
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Asynchronous Down Counter Using T-flip flop

Asynchronous Down Counter Using T-flip flop
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All gates implementation

All gates implementation
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