project.name

Kritika Yadav

Member since: 7 months

Educational Institution: Not Entered

Country: Not Entered

8 bit register using flip flop

8 bit register using flip flop
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1*8 demultiplexer

1*8 demultiplexer
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incrementer and decrementer

incrementer and decrementer
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half adder

half adder
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4*1 multiplexer

4*1 multiplexer
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LOGICAL UNIT AND ARITHEMATIC LOGICAL UNIT

LOGICAL UNIT AND ARITHEMATIC LOGICAL UNIT
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4 bit arithematic ckt

4 bit arithematic ckt
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ECL Lab 5

ECL Lab 5
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binary to gray

binary to gray
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3*8 line decoder

3*8 line decoder
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Data path

Data path
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LOGICAL UNIT AND ARITHEMATIC LOGICAL UNIT

LOGICAL UNIT AND ARITHEMATIC LOGICAL UNIT
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Flip-Flops using NAND Gate

Flip-Flops using NAND Gate
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Carry Look-Ahead Adder

Carry Look-Ahead Adder
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8-bit_Input-Output(8bit Register)

8-bit_Input-Output(8bit Register)
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DATA PATH OF COMPUTER FROM IT'S REGISTER

DATA PATH OF COMPUTER FROM IT'S REGISTER
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1-4 DE-MULTIPLEXER

1-4 DE-MULTIPLEXER
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Carry Look-Ahead Adder

Carry Look-Ahead Adder
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