Universal 4bit Shift Register
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Author: Mukul Gaur

Forked from: Raghav Murarka/Universal 4bit Shift Register

Project access type: Public

Description:

To Clear the output enable the CLEAR input and then Disable it

Operations                         S1         S0


For Left Shift                      0           1

For Right Shift                    1            0

For Parallel Loads              1            1

Created: Nov 25, 2023

Updated: Nov 25, 2023


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