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Logic Gates
Logic Gatesconstruction of an aclu
construction of an aclupiya
piyapiya
piyaUntitled
Untitled1 bit full adder
1 bit full adder1 bit alu
1 bit aluXOR Gate
XOR Gate4 Bits ALU
4 Bits ALUSAP - 1
SAP - 1ALU
ALUFULL ADDER USING HALF ADDER
FULL ADDER USING HALF ADDERALU
ALU4-bit ALU
4-bit ALULogic Gates
Logic Gates4 Bit ALU
4 Bit ALUHalf-Adder
Half-Adder4-bit ALU
4-bit ALU4 bit binary adder
4 bit binary adder1 bit full adder
1 bit full adderSTRING CPU 2000
STRING CPU 2000STRING CPU 2000
STRING CPU 20004 bit ALU
4 bit ALU4 bit ALU
4 bit ALUALU
ALUHalf-Adder
Half-Adderteeest
teeestteeest
teeestteeest
teeestteeest
teeestFull Adder
Full Adder2-bit Full Adder
2-bit Full AdderALU
ALUBITS
BITS4 bit binary adder
4 bit binary adder4 BIT BCD ADDER
4 BIT BCD ADDERAssignment 2- Full adders
Assignment 2- Full adders8-Bit Computer
8-Bit ComputerAssignment 2- Full adders
Assignment 2- Full addersCSC4536-v2
CSC4536-v2Experiment-2
Experiment-2Full Adder
Full Adderplanting scenerio
planting scenerioxor gate
xor gateXOR GATE
XOR GATESAP - 1
SAP - 1Simple 4 Bit Computer
Simple 4 Bit Computer8 Bit CPU
8 Bit CPU1-bit summer
1-bit summerconstruction of an aclu
construction of an acluAssignment 2- Full adders
Assignment 2- Full addersAssignment 2- Full adders
Assignment 2- Full addersSAP - 1
SAP - 1full adder using subcircuts
full adder using subcircutsFULL ADDER USING HALF ADDER
FULL ADDER USING HALF ADDERFULL ADDER USING HALF ADDER
FULL ADDER USING HALF ADDERFull Adder -- Separate Half Adder
Full Adder -- Separate Half Adderfull adder separate half adders 1
full adder separate half adders 1full adder with compression
full adder with compressiontest
testtrest
trestfull adder with subcircuits 3
full adder with subcircuits 3SAP-1
SAP-1SIMPLE COMPUTER
SIMPLE COMPUTERtest.for.o1.cv
test.for.o1.cvXOR gate from NAND gate and XOR gate from NOR gate[Practical 5]
XOR gate from NAND gate and XOR gate from NOR gate[Practical 5]