project.name

Pratham S

Member since: 1 year

Educational Institution: Presidency University, Bangalore

Country: India

2-bit Comparator

2-bit Comparator
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1-bit Comparator

1-bit Comparator
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8:1 MUX

8:1 MUX
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8:3 Encoder

8:3 Encoder
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1:2 DeMUX

1:2 DeMUX
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1:4 DeMUX

1:4 DeMUX
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Half Adder

Half Adder
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Half Subtractor

Half Subtractor
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4:2 Priority Encoder

4:2 Priority Encoder
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NAND Implementation

NAND Implementation
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NOR Implementation

NOR Implementation
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Full Adder

Full Adder
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Full Subtractor

Full Subtractor
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2:1 Mux

2:1 Mux
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All gate Implementation

All gate Implementation
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FlipFlops

FlipFlops
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Synchronous UP Counter

Synchronous UP Counter
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DECODER

DECODER
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4:2 Encoder

4:2 Encoder
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Asynchronous UP Counter Using T-flip flop

Asynchronous UP Counter Using T-flip flop
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4:1 Mux

4:1 Mux
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