Member since: 1 year
Educational Institution: UET PESHAWAR(university of engineering and technology peshawar JALOAI CAMPUS)
Country: Pakistan
SR LATCH
SR LATCHJK FLIP FLOP (CLR-PRE)
JK FLIP FLOP (CLR-PRE)POS FORM LAB N0 06
POS FORM LAB N0 06And gate display
And gate displayOR gate display
OR gate displayxor gate display
xor gate displayNand gate display
Nand gate displayXnor gate display
Xnor gate displayNOT gate display
NOT gate display8x1 multiplexer
8x1 multiplexerD- flip flop
D- flip flopSR latch
SR latch4 bit register
4 bit register8x1 multiplexer by using all logic gates
8x1 multiplexer by using all logic gateslab no 1
lab no 1Lab assignment 6
Lab assignment 6Lab assignment 6
Lab assignment 6SOP
SOPSOP
SOPUnSimplified
UnSimplifiedSimplified
SimplifiedCIRCUIT OF SOP
CIRCUIT OF SOPUntitled
UntitledNor gate display
Nor gate display