PRANJAL MUDGAL
Member since: 1 year
Educational Institution: A K G E C
Country: India
Decrement
Decrement
Public
Design 1 bit ALU
Design 1 bit ALU
Public
2bit carry bit look ahead adder
2bit carry bit look ahead adder
Public
2*4 line decoder
2*4 line decoder
Public
4 bit carry bit look ahead adder
4 bit carry bit look ahead adder
Public
Untitled
Untitled
Public
a+b+ac
a+b+ac
Public
pranjal123#/Experiment No. 1
pranjal123#/Experiment No. 1
Public
implement logic gates
implement logic gates
Public
4x1 Multiplexer
4x1 Multiplexer
Public
binary to gray and gray to binary
binary to gray and gray to binary
Public
8bit input output bus using 8*1 mux
8bit input output bus using 8*1 mux
Public
data path
data path
Public
4 bit carrylaa
4 bit carrylaa
Public
sr latch and sr flipflop
sr latch and sr flipflop
Public
ripple carry adder 4 bit
ripple carry adder 4 bit
Public
increment
increment
Public
3*8 decoder
3*8 decoder
Public
SR
SR
Public
SR FLIP FLOP INT PRACTICAL
SR FLIP FLOP INT PRACTICAL
Public
common bus for 4 bit 4 registers
common bus for 4 bit 4 registers
Public
combinational ckt
combinational ckt
Public
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