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Shivprasad Patil

Member since: 8 months

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half adder

half adder
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Half Subtractor

Half Subtractor
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Half Subtractor

Half Subtractor
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Untitled

Untitled
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Untitled

Untitled
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Half and Full Adder

Half and Full Adder
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2X4 encoder

2X4 encoder
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Priority Encoder (4:2)

Priority Encoder (4:2)
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Half ADDER

Half ADDER
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HALF Subtractor by NAND

HALF Subtractor by NAND
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FULL Adder by NAND gates

FULL Adder by NAND gates
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Full Subtractor by NAND gates

Full Subtractor by NAND gates
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Multiplexer(MUX)(4:1)

Multiplexer(MUX)(4:1)
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2:1 MUX multiplexer.

2:1 MUX multiplexer.
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EXPERIMENT 8

EXPERIMENT 8
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Untitled

Untitled
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4;1 MULTIPLEXER

4;1 MULTIPLEXER
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EXP 6

EXP 6
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EXP 7

EXP 7
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RIPPLE COUNTER CIRCUIT DIA

RIPPLE COUNTER CIRCUIT DIA
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Experiment 5 on 5-10-23

Experiment 5 on 5-10-23
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Shivprasad Patil is not a collaborator of any project.

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