project.name

Nagendra Babu R

Member since: 1 year

Educational Institution: Presidency University

Country: India

Half Adder

Half Adder
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8:3 Encoder

8:3 Encoder
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Synchronous counter

Synchronous counter
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1:2 DeMUX

1:2 DeMUX
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Full Subtractor

Full Subtractor
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Full Adder

Full Adder
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Half Subtractor

Half Subtractor
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Asynchronous Down Counter Using T-flip flop

Asynchronous Down Counter Using T-flip flop
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1:4 DeMUX

1:4 DeMUX
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8:1 MUX

8:1 MUX
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4:1 MUX

4:1 MUX
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4:2 Encoder

4:2 Encoder
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JK to D

JK to D
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mux and demux

mux and demux
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Nor Implementation

Nor Implementation
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DECODER

DECODER
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2-BIT COMPARATOR

2-BIT COMPARATOR
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Flip flops

Flip flops
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Basic Gates

Basic Gates
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2:1 MUX

2:1 MUX
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Half Subtractor

Half Subtractor
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Nagendra Babu R is not a collaborator of any project.

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