project.name

rupanethi

Member since: 1 year

Educational Institution: presidency university

Country: India

Untitled

Untitled
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NAND GATE IMPLEMENTATION

NAND GATE IMPLEMENTATION
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basic gates

basic gates
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untitled
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NAND GATE COMBINATION

NAND GATE COMBINATION
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NAND GATE OF A DIGITAL SYSTEM

NAND GATE OF A DIGITAL SYSTEM
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gates

gates
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Designing De-Multiplexer

Designing De-Multiplexer
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flipflop

flipflop
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K-Map digital circuit

K-Map digital circuit
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Untitled

Untitled
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Untitled

Untitled
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1-Bit Magnitude comparator

1-Bit Magnitude comparator
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4:2&8:3 encoder

4:2&8:3 encoder
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Untitled

Untitled
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Designing of Mux

Designing of Mux
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PRIORITY ENCODER

PRIORITY ENCODER
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Full Adder From 2 half Adders

Full Adder From 2 half Adders
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Full Subtractor

Full Subtractor
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Full Adder

Full Adder
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EXP5

EXP5
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exp 7

exp 7
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EXP3

EXP3
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jk flipflop

jk flipflop
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SR Flip - Flop

SR Flip - Flop
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Flip Flops

Flip Flops
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8:3 Encoder

8:3 Encoder
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Untitled

Untitled
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exp1 lev2

exp1 lev2
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1:2 demux

1:2 demux
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Expt-7 l2

Expt-7 l2
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4:2&8:3 encoder

4:2&8:3 encoder
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Untitled

Untitled
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Untitled

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