4:1 AND 1:4 MUX AND DEMUX

Half adder and Half Subtractor

full adder and subtractor

Experiment 5

4-Bit Synchronous Up Counter

full adder and full subtractor

DEMUX 1:2

4:1 AND 1:4 MUX AND DEMUX

Untitled

experiment 5 level 2

ADDERS AND SUBTRACTORS USING NAND1

DEMUX 1:8

All Basic Gates

basic gates using universal gates(nor)

SR Flip Flop

Construction of basic gates using Nand

1 BIT COMPARATOR

half adder and subtractor using xor and and gates

MUX AND DEMUXES

ENCODERS AND DECODERS

2 Bit comparator

JK Flip Flop

T Flip Flop

D To JK Flip Flop Conversion

D Flip Flop

JK To D Flip Flop Conversion

3 bit asynchronous up counter

3 bit asynchronous down counter

EXPT 5 LEVEL 1

3 bit asynchronous up counter