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4:1 AND 1:4 MUX AND DEMUX
4:1 AND 1:4 MUX AND DEMUXHalf adder and Half Subtractor
Half adder and Half Subtractorfull adder and subtractor
full adder and subtractorExperiment 5
Experiment 5EXPT 5 LEVEL 1
EXPT 5 LEVEL 14-Bit Synchronous Up Counter
4-Bit Synchronous Up Counterfull adder and full subtractor
full adder and full subtractorDEMUX 1:2
DEMUX 1:24:1 AND 1:4 MUX AND DEMUX
4:1 AND 1:4 MUX AND DEMUXUntitled
Untitledexperiment 5 level 2
experiment 5 level 2DEMUX 1:8
DEMUX 1:83 bit asynchronous up counter
3 bit asynchronous up counterAll Basic Gates
All Basic Gatesbasic gates using universal gates(nor)
basic gates using universal gates(nor)JK To D Flip Flop Conversion
JK To D Flip Flop ConversionSR Flip Flop
SR Flip Flop3 bit asynchronous up counter
3 bit asynchronous up counter3 bit asynchronous down counter
3 bit asynchronous down counterJK Flip Flop
JK Flip FlopConstruction of basic gates using Nand
Construction of basic gates using Nand1 BIT COMPARATOR
1 BIT COMPARATORhalf adder and subtractor using xor and and gates
half adder and subtractor using xor and and gatesMUX AND DEMUXES
MUX AND DEMUXESADDERS AND SUBTRACTORS USING NAND1
ADDERS AND SUBTRACTORS USING NAND1ENCODERS AND DECODERS
ENCODERS AND DECODERS2 Bit comparator
2 Bit comparatorT Flip Flop
T Flip FlopD To JK Flip Flop Conversion
D To JK Flip Flop ConversionD Flip Flop
D Flip Flop