Nidhi
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Untitled
Untitled
Public
EXPERIMENT-04 LEVEL-01: ENCODER AND DECODER
EXPERIMENT-04 LEVEL-01: ENCODER AND DECODER
Public
EXPERIMENT-04 LEVEL-02 PRIORITY ENCODER
EXPERIMENT-04 LEVEL-02 PRIORITY ENCODER
Public
HALFADDER/HALFSUBSTRACOR
HALFADDER/HALFSUBSTRACOR
Public
full adder
full adder
Public
Untitled
Untitled
Public
EXP-6 LEVEL-01 FLIP FLOPS
EXP-6 LEVEL-01 FLIP FLOPS
Public
l-1 2:1 and 4:1 MUX
l-1 2:1 and 4:1 MUX
Public
EXP-03 ,,L-01 1:2 and 1:4 DEMUX
EXP-03 ,,L-01 1:2 and 1:4 DEMUX
Public
EXP-03 l-02 2:1 and 4:1 MUX
EXP-03 l-02 2:1 and 4:1 MUX
Public
l-1 using logic gates
l-1 using logic gates
Public
Exp-06 L-2 JK FlipFlop
Exp-06 L-2 JK FlipFlop
Public
EXPERIMENT-01 LEVEL-01 3BIT ASYNCHRONOUS
EXPERIMENT-01 LEVEL-01 3BIT ASYNCHRONOUS
Public
EXP-08 #BIT ASYCHRONOUS UP COUNTER
EXP-08 #BIT ASYCHRONOUS UP COUNTER
Public
EXP-08 3BIT ASYNCHRONOUS DOWN COUNTER
EXP-08 3BIT ASYNCHRONOUS DOWN COUNTER
Public
l-1 using nand gates
l-1 using nand gates
Public
EXP-06 L-2 JK to D-FLIPFLOP CONVERSION
EXP-06 L-2 JK to D-FLIPFLOP CONVERSION
Public
JK FLIPFLOP USING SR FLIPFLOP
JK FLIPFLOP USING SR FLIPFLOP
Public
COUNTER SEQUENCE 0-1-2-0
COUNTER SEQUENCE 0-1-2-0
Public
MOD-05 COUNTER
MOD-05 COUNTER
Public
3-BIT DOWN COUNTER
3-BIT DOWN COUNTER
Public
EXP-7 4-BIT SYNCHRONOUS
EXP-7 4-BIT SYNCHRONOUS
Public
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