Half adder

Half subtractor

Full Adder

Full subtractor

Full subtractor

4 bit Adder

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half subtractor using NOR

Q4 grp 3

SIPO

T1 AOI

OAI LOGIC

OAI F'

NAND ONLY

NOR ONLY 1

NOR ONLY 1

NOR ONLY 2

NAND Only 2

4:2 Enc NAND

DECODER TASK 1

Half adder decoder

FULL ADDER DECODER

FULL SUBTRACTOR DECODER

HALF SUBTRACTOR DECODER

16:1 F'SOP

8:1 MUX FSOP

8:1 F'SOP

HALF ADDER 4:1

Half subtractor 4:1

FULL ADDER 4:1

Full subtarctor 4:1

2:4 Decoder

2:4 NAND LOGIC

AOI 4:2 Encoder

4 Bit PIPO

SOP DA

3 bit Magnetic Comparator

cat 2 b2 q3

SOP DA

POS SL

cat 2 b2 q5

30_22BCE3117_4Bit ALU

B1 q1

b1 q4

b1q2

b2q1

b2q4

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question 8 part A

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1:4 DEMUX OAI

1:4 using AOI

question 2

question 3

NOR

3 input majority

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SET B QUESTION 2

Q6

question 8

question 13

question 17

1 bit ALU

1 bit ALU

2:1 MUX AOI

MUX POS

MUX 2:1 POS

2:1 MUX NAND

MUX NOR

Half adder using 4:1 MUX

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DECODER

FSOP 16:1

2:1 using decoders

COMPARATOR 1:4

PISO

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mod_3 counter

b1 q5

b2q5

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cat 2 b1q3

CAT 2 b1 q5

cat 2 b2q2

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decoder da

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demux da

MUX DA new

Bidirectional Shift Register

NAND