project.name

Johan Thomas

Member since: 1 year

Educational Institution: Not Entered

Country: Not Entered

HA

HA
Public
project.name

FA

FA
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HS

HS
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HF

HF
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PISO SHIFT REGISTER

PISO SHIFT REGISTER
Public
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4 bit adder

4 bit adder
Public
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2x2 multiplier

2x2 multiplier
Public
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BCD to 4521 using NAND Logic with Don

BCD to 4521 using NAND Logic with Don
Public
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SIPO

SIPO
Public
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Task I (POS) implemented using Decoder Active Low logic

Task I (POS) implemented using Decoder Active Low logic
Public
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Untitled

Untitled
Public
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CAT2 B2 Q2

CAT2 B2 Q2
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CAT2 B1 Q5

CAT2 B1 Q5
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CAT2 B1 Q3

CAT2 B1 Q3
Public
project.name

CAT2 B1 Q4

CAT2 B1 Q4
Public
project.name

CAT 2 B1 Q4

CAT 2 B1 Q4
Public
project.name

CAT2 B1 Q5

CAT2 B1 Q5
Public
project.name

CAT2 B2 Q3

CAT2 B2 Q3
Public
project.name

CAT2 B2 Q4

CAT2 B2 Q4
Public
project.name

CAT2 B2 Q5

CAT2 B2 Q5
Public
project.name

Untitled

Untitled
Public
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Untitled

Untitled
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project.name

Untitled

Untitled
Public
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Untitled

Untitled
Public
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Untitled

Untitled
Public
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Binary to gray code POS

Binary to gray code POS
Public
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BCD to 4521 using AOI Logic with Don

BCD to 4521 using AOI Logic with Don
Public
project.name

SOP canonical expression of MUX and circuit implemented in MUX

SOP canonical expression of MUX and circuit implemented in MUX
Public
project.name

2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
Public
project.name

POS canonical expression of MUX and circuit implemented in MUX

POS canonical expression of MUX and circuit implemented in MUX
Public
project.name

SOP canonical expression of MUX and circuit implemented in MUX

SOP canonical expression of MUX and circuit implemented in MUX
Public
project.name

2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
project.name

2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
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Untitled

Untitled
Public
project.name

8x1_mux_22bce2157

8x1_mux_22bce2157
Public
project.name

8x1 multiplexer using two 4x1 and one 2x1

8x1 multiplexer using two 4x1 and one 2x1
Public
project.name

8x1 multiplexer using two 4x1 and one 2x1

8x1 multiplexer using two 4x1 and one 2x1
Public
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Untitled

Untitled
Public
project.name

AOI logic circuit of 4:2 encoder

AOI logic circuit of 4:2 encoder
Public
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AOI logic circuit of 2:4 Decoder

AOI logic circuit of 2:4 Decoder
Public
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NAND logic circuit of 2:4 Decoder

NAND logic circuit of 2:4 Decoder
Public
project.name

AOI logic circuit of 2:4 Decoder

AOI logic circuit of 2:4 Decoder
Public
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INTERNAL CIRCUIT OF 1:2 DEMUX USING TWO INPUT NAND GATE

INTERNAL CIRCUIT OF 1:2 DEMUX USING TWO INPUT NAND GATE
Public
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Untitled

Untitled
Public
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4 : 1 multiplexer

4 : 1 multiplexer
Public
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1 Bit Comparator

1 Bit Comparator
Public
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4 : 1 multiplexer

4 : 1 multiplexer
Public
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newproject

newproject
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CAT B1 Q5

CAT B1 Q5
Public
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Q3_DA_USING_MUX

Q3_DA_USING_MUX
Public
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7 Segment Decoder common cathode

7 Segment Decoder common cathode
Public
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BCD to 4521 NOR with dc

BCD to 4521 NOR with dc
Public
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7 segment display using 1:16 decoder

7 segment display using 1:16 decoder
Public
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Untitled

Untitled
Public
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Untitled

Untitled
Public
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7 segment display using 1:16 decoder

7 segment display using 1:16 decoder
Public
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CAT1 B2 Q1

CAT1 B2 Q1
Public
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new1

new1
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new2

new2
Public
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CAT 1 B1 Q1

CAT 1 B1 Q1
Public
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CAT 1 B1 Q1

CAT 1 B1 Q1
Public
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Binary to Gray code NOR

Binary to Gray code NOR
Public
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Design the given circuit using SOP (And-or-invert) logic.

Design the given circuit using SOP (And-or-invert) logic.
Public
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Binary to Gray code SOP

Binary to Gray code SOP
Public
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Untitled

Untitled
Public
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Untitled

Untitled
Public
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Untitled

Untitled
Public
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Untitled

Untitled
Public
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Parallel in Parallel Out Shift Register

Parallel in Parallel Out Shift Register
Public
project.name

CAT 1 B2 Q2

CAT 1 B2 Q2
Public
project.name

CAT 1 B1 Q4

CAT 1 B1 Q4
Public
project.name

CAT-1 B1 Q2

CAT-1 B1 Q2
Public
project.name

CAT1 B2 Q5

CAT1 B2 Q5
Public
project.name

CAT1 B2 Q4

CAT1 B2 Q4
Public
project.name

BCD to 4521 OAI with dc

BCD to 4521 OAI with dc
Public
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demux with dont care

demux with dont care
Public
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BCD to 4521 using Decoder with Don

BCD to 4521 using Decoder with Don
Public
project.name

1:2 Demux using NAND logic

1:2 Demux using NAND logic
Public
project.name

Binary to 7 Segment

Binary to 7 Segment
Public
project.name

cat 2 b1 q2

cat 2 b1 q2
Public
project.name

Task I (POS) implemented using Decoder Active High logic

Task I (POS) implemented using Decoder Active High logic
Public
project.name

Task I (SOP) implemented using Decoder Active High logic

Task I (SOP) implemented using Decoder Active High logic
Public
project.name

2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
Public
project.name

Serial In Serial Out Shift Register - D flip flop

Serial In Serial Out Shift Register - D flip flop
Public
project.name

2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
Public
project.name

7 Seg Decoder COMMON ANODE

7 Seg Decoder COMMON ANODE
Public
project.name

1:2 Demux using NAND logic

1:2 Demux using NAND logic
Public
project.name

Binary to Gray code NAND

Binary to Gray code NAND
Public
project.name
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