Member since: 1 year
Educational Institution: Not Entered
Country: Not Entered
Task 2 03 L43+L44 Full Adder
Task 2 03 L43+L44 Full AdderTASK 2 03 L43+L44 Half Adder
TASK 2 03 L43+L44 Half AdderTask 2 03 L43+L44 4 Bit Adder
Task 2 03 L43+L44 4 Bit AdderSISO Shift Register 03 22BCE0220 S.Varun L43+L44
SISO Shift Register 03 22BCE0220 S.Varun L43+L44SIPO Shift Register 03 22BCE0220 S.Varun L43+L44
SIPO Shift Register 03 22BCE0220 S.Varun L43+L44random counter 03 22BCE0220 S.Varun L43+L44
random counter 03 22BCE0220 S.Varun L43+L44PIPO Shift Register 03 22BCE0220 S.Varun L43+L44
PIPO Shift Register 03 22BCE0220 S.Varun L43+L44Bidirectional Shift Register
Bidirectional Shift Registercat2b1q1 _03_L43_L44_22BCE0220
cat2b1q1 _03_L43_L44_22BCE0220cat1 b1 q1
cat1 b1 q1cat1b2q1_03_L43_L44_22BCE0220
cat1b2q1_03_L43_L44_22BCE0220cat1b2q1
cat1b2q1cat1b2q1
cat1b2q1TASK 2 03 L43+L44 3x3 Multiplier
TASK 2 03 L43+L44 3x3 MultiplierTASK 2 03 L43+L44 4x4 Multiplier
TASK 2 03 L43+L44 4x4 MultiplierT2_3x3_22BCE3117_S Haswanth
T2_3x3_22BCE3117_S HaswanthT2_4x4_22BCE3117_S Haswanth
T2_4x4_22BCE3117_S HaswanthTask 2 03 FS 22BCE0220 S.Varun
Task 2 03 FS 22BCE0220 S.VarunTask 2 03 HS 22BCE0220 S.Varun
Task 2 03 HS 22BCE0220 S.VarunTASK 1 03 L43+L44 22BCE0220 S.Varun SOP F
TASK 1 03 L43+L44 22BCE0220 S.Varun SOP FTASK 1 03 L43-L44 22BCE0220 S.Varun SOP F'
TASK 1 03 L43-L44 22BCE0220 S.Varun SOP F'Untitled
Untitledcat1b1q2
cat1b1q2FA using the 4:1 MUX 03 22BCE0220 L43+L44
FA using the 4:1 MUX 03 22BCE0220 L43+L44FS using the 4:1 MUX 03 22BCE0220 L43+L44
FS using the 4:1 MUX 03 22BCE0220 L43+L448:1 Using The 4:1 MUX 03 22BCE0220 L43+L44
8:1 Using The 4:1 MUX 03 22BCE0220 L43+L44SOP on the MUX 03 22BCE0220 L43+L44
SOP on the MUX 03 22BCE0220 L43+L44FA using the 8:1 MUX 03 22BCE0220 L43+L44
FA using the 8:1 MUX 03 22BCE0220 L43+L44FS using the 8:1 MUX 03 22BCE0220 L43+L44
FS using the 8:1 MUX 03 22BCE0220 L43+L44SOP using the 4:1 MUX 03 22BCE0220 L43+L44
SOP using the 4:1 MUX 03 22BCE0220 L43+L44cat2 b2 q1 _03_L43_L44_22BCE0220
cat2 b2 q1 _03_L43_L44_22BCE0220cat1 b1 q1 _03_L43_L44_22BCE0220
cat1 b1 q1 _03_L43_L44_22BCE02202:1 MUX using the SOP equation 03 22BCE0220 L43+L44
2:1 MUX using the SOP equation 03 22BCE0220 L43+L442:1 MUX using the POS NOR 03 22BCE0220 L43+L44
2:1 MUX using the POS NOR 03 22BCE0220 L43+L44POS using the 4:1 MUX 03 22BCE0220 L43+L44
POS using the 4:1 MUX 03 22BCE0220 L43+L44POS 16:1 MUX 03 22BCE0220 L43+L44
POS 16:1 MUX 03 22BCE0220 L43+L442x1_Multiplexer_NAND_03_22BCE0220_S.Varun_L43_L44_HOTVIVA_Q1
2x1_Multiplexer_NAND_03_22BCE0220_S.Varun_L43_L44_HOTVIVA_Q1AOI logic circuit of 2:4 decoder 03 22BCE0220 L43+L44
AOI logic circuit of 2:4 decoder 03 22BCE0220 L43+L44NAND logic circuit of 4:2 encoder 03 22BCE0220 L43+L44
NAND logic circuit of 4:2 encoder 03 22BCE0220 L43+L44Half adder using Decoder 03 22BCE0220 L43+L44
Half adder using Decoder 03 22BCE0220 L43+L44Half subtractor using Decoder 03 22BCE0220 L43+L44
Half subtractor using Decoder 03 22BCE0220 L43+L4416:1 Using The 8:1 MUX 03 22BCE0220 S.Varun L43+L44
16:1 Using The 8:1 MUX 03 22BCE0220 S.Varun L43+L44DA Q3 SOP (AOI)
DA Q3 SOP (AOI)DA Q3 POS (OAI)
DA Q3 POS (OAI)DA Q3 NAND
DA Q3 NANDDA QUES 3 DEMUX
DA QUES 3 DEMUXDA QUES 3 DECODER
DA QUES 3 DECODERDecoder using the SOP 03 22BCE0220 L43+L44
Decoder using the SOP 03 22BCE0220 L43+L444:1 Using The 2:1 MUX 03 22BCE0220 L43+L44
4:1 Using The 2:1 MUX 03 22BCE0220 L43+L44cat2b1q1
cat2b1q1cat1b2q1
cat1b2q1B2 Q4 CAT1 03 22BCE0220 S.Varun L43+L44
B2 Q4 CAT1 03 22BCE0220 S.Varun L43+L44DA QUES 3 DECODER
DA QUES 3 DECODERDA QUES3 MUX
DA QUES3 MUXTASK 1 03 L43-L44 22BCE0220 S.Varun POS F'
TASK 1 03 L43-L44 22BCE0220 S.Varun POS F'2:1 using the POS equation 03 22BCE0220 L43+L44
2:1 using the POS equation 03 22BCE0220 L43+L44CAT1 B1 Q2 03 22BCE0220 S.Varun L43+L44
CAT1 B1 Q2 03 22BCE0220 S.Varun L43+L44Full adder using Decoder 03 22BCE0220 L43+L44
Full adder using Decoder 03 22BCE0220 L43+L44AOI logic circuit of 4:2 encoder 03 22BCE0220 L43+L44
AOI logic circuit of 4:2 encoder 03 22BCE0220 L43+L44SOP 16:1 MUX 03 22BCE0220 L43+L44
SOP 16:1 MUX 03 22BCE0220 L43+L44POS using the MUX 03 22BCE0220 L43+L44
POS using the MUX 03 22BCE0220 L43+L442:1 MUX using the SOP NAND equation 03 22CE0220 L43+L44
2:1 MUX using the SOP NAND equation 03 22CE0220 L43+L44Decoder_To_NOR_Implementation_03_22BCE0220_S.Varun_HOTVIVA_Q2
Decoder_To_NOR_Implementation_03_22BCE0220_S.Varun_HOTVIVA_Q2NAND logic circuit of 2:4 decoder 03 22BCE0220 L43+L44
NAND logic circuit of 2:4 decoder 03 22BCE0220 L43+L44Full subtractor using Decoder 03 22BCE0220 L43+L44
Full subtractor using Decoder 03 22BCE0220 L43+L44Mod N Counter 03 22BCE0220 S.Varun L43+L44
Mod N Counter 03 22BCE0220 S.Varun L43+L44CAT1 B2 Q2 cat1 b2 q2 03 22BCE0220 S.Varun L43+L44
CAT1 B2 Q2 cat1 b2 q2 03 22BCE0220 S.Varun L43+L44DA Q3 NOR
DA Q3 NOR