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half adder
half adderHalf subtractor
Half subtractorFull Adder
Full AdderFull subtractor
Full subtractor4 bit adder
4 bit adder2x2 multiplier
2x2 multiplier3x3 Multiplier
3x3 Multiplier4x4 Multiplier
4x4 Multiplierhalf adder
half adderhalf adder
half adderTask1
Task1Task1
Task1Task1
Task116:1 using 8:1 mux
16:1 using 8:1 mux4:1 mux using 2:1 mux
4:1 mux using 2:1 mux8:1 MUX using 4:1 MUX
8:1 MUX using 4:1 MUX2:1 mux AOI
2:1 mux AOI2:1 MUX OAI
2:1 MUX OAI2:1 mux NAND
2:1 mux NAND2:1mux using NOR
2:1mux using NORmod_n_counter
mod_n_countersiso
sisosipo
sipopipo
pipopiso
pisoAOI logic circuit of 2:4 Decoder
AOI logic circuit of 2:4 DecoderNAND logic circuit 2:4 decoder
NAND logic circuit 2:4 decoderrandom counter
random counterda3 sop
da3 sopda3 pos
da3 pos3:8 decoder using AOI logic
3:8 decoder using AOI logiccat1 q4
cat1 q4AOI logic circuit of 4:2 encoder
AOI logic circuit of 4:2 encoderNAND logic circuit of 4:2 encoder
NAND logic circuit of 4:2 encoderF sop using decoder
F sop using decoderhalf adder using decoder
half adder using decoderfull adder using decoder
full adder using decoderfull subtractor using decoder
full subtractor using decoder8:1 mux of d
8:1 mux of d4:1 mux using reg
4:1 mux using reg1 bit ALU
1 bit ALU4bit alu
4bit alu8:1 mux
8:1 muxmulti bcd
multi bcddcoder with dont care
dcoder with dont carebcd mux
bcd muxEncoders
EncodersDEMUX 16:1
DEMUX 16:1cat1 Q1
cat1 Q1cat1 q2
cat1 q2cat1 q5
cat1 q5da3 nand
da3 nandda3 sop
da3 sopTASK1
TASK1bidirectional shift register
bidirectional shift registerhalf subtractor using decoder
half subtractor using decoderda3 nor
da3 norda3 sop
da3 sopmux 16:1
mux 16:1ENCODER 32:5
ENCODER 32:54 BIT ALU
4 BIT ALU