half adder

Half subtractor

Full Adder

Full subtractor

4 bit adder

2x2 multiplier

3x3 Multiplier

4x4 Multiplier

half adder

half adder

Task1

Task1

TASK1

Task1

mux 16:1

16:1 using 8:1 mux

4:1 mux using 2:1 mux

8:1 MUX using 4:1 MUX

2:1 mux AOI

2:1 MUX OAI

2:1 mux NAND

2:1mux using NOR

mod_n_counter

siso

sipo

pipo

piso

bidirectional shift register

AOI logic circuit of 2:4 Decoder

NAND logic circuit 2:4 decoder

random counter

da3 sop

da3 pos

3:8 decoder using AOI logic

cat1 q4

AOI logic circuit of 4:2 encoder

NAND logic circuit of 4:2 encoder

F sop using decoder

half adder using decoder

full adder using decoder

half subtractor using decoder

full subtractor using decoder

8:1 mux of d

4:1 mux using reg

1 bit ALU

4 BIT ALU

4bit alu

8:1 mux

multi bcd

dcoder with dont care

bcd mux

Encoders

ENCODER 32:5

DEMUX 16:1

cat1 Q1

cat1 q2

cat1 q5

da3 nand

da3 nor

da3 sop

da3 sop