Sachin Diwakar 22BKT0079 - Circuits

Sachin Diwakar 22BKT0079

Member since: 1 year

Educational Institution: Not Entered

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CAT1. B1. Q4

CAT1. B1. Q4

Public

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CAT1. B1. Q5

CAT1. B1. Q5

Public

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CAT1. B2. Q1

CAT1. B2. Q1

Public

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CAT2. B2. Q4

CAT2. B2. Q4

Public

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CAT1. B1. Q1

CAT1. B1. Q1

Public

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CAT2. B1. Q4

CAT2. B1. Q4

Public

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NAND implementation of 4:2 decoder

NAND implementation of 4:2 decoder

Public

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AOI Implementation of 4:2 Encoder

AOI Implementation of 4:2 Encoder

Public

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Implementing AOI Circuit of 2:4 decoder

Implementing AOI Circuit of 2:4 decoder

Public

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Implementing SOP(F) using Decoder

Implementing SOP(F) using Decoder

Public

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Implementing POS(F) using Decoder

Implementing POS(F) using Decoder

Public

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Implementing Full Subtracter using Decoder

Implementing Full Subtracter using Decoder

Public

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Implementing Half Subtractor using Decoder

Implementing Half Subtractor using Decoder

Public

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Half Adder(POS)

Half Adder(POS)

Public

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Half Adder(NOR)

Half Adder(NOR)

Public

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Half Adder(NAND)

Half Adder(NAND)

Public

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Full Adder(SOP)

Full Adder(SOP)

Public

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Full Subtractor(SOP)

Full Subtractor(SOP)

Public

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Multiplier

Multiplier

Public

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Half Subtractor(POS)

Half Subtractor(POS)

Public

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Untitled

Untitled

Public

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4 - bit Adder

4 - bit Adder

Public

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Half Subtractor(NAND)

Half Subtractor(NAND)

Public

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SOP F(AOI) - 22BKT0079

SOP F(AOI) - 22BKT0079

Public

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SOP F'(AOI) - 22BKT0079

SOP F'(AOI) - 22BKT0079

Public

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POS F(AOI)

POS F(AOI)

Public

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POS F'(AOI)

POS F'(AOI)

Public

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POS F(OAI)

POS F(OAI)

Public

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ZZ

ZZ

Public

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POS F'(OAI)

POS F'(OAI)

Public

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SOP F(OAI)

SOP F(OAI)

Public

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SOP F'(OAI)

SOP F'(OAI)

Public

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SOP F(NAND)

SOP F(NAND)

Public

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SOP F'(NAND)

SOP F'(NAND)

Public

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POS F(NAND)

POS F(NAND)

Public

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SOP F'(NAND)

SOP F'(NAND)

Public

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Half Adder(NOR)

Half Adder(NOR)

Public

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CAT2. B2. Q1

CAT2. B2. Q1

Public

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Task-3-MUX-SOP(F)

Task-3-MUX-SOP(F)

Public

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Task-3-MUX-POS(f)

Task-3-MUX-POS(f)

Public

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AOI CIrcuit of 2X1 MUX using SOP

AOI CIrcuit of 2X1 MUX using SOP

Public

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NAND Circuit using of 2X1 MUX using SOP

NAND Circuit using of 2X1 MUX using SOP

Public

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NOR Circuit of 2X1 MUX using POS

NOR Circuit of 2X1 MUX using POS

Public

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3-bit Even Parity Checker

3-bit Even Parity Checker

Public

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Implementing Full Subtractor using 8:1 MUX

Implementing Full Subtractor using 8:1 MUX

Public

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1-bit ALU using Full Adder

1-bit ALU using Full Adder

Public

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4-BIT ALU

4-BIT ALU

Public

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Viva Task - 2

Viva Task - 2

Public

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Untitled

Untitled

Public

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Untitled

Untitled

Public

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Implementing bit-converter using decoder(16X1)

Implementing bit-converter using decoder(16X1)

Public

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Implementing bit-converter using demultiplexor

Implementing bit-converter using demultiplexor

Public

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Implementing Synchronous Mod-9 Counter using T-flip-flop

Implementing Synchronous Mod-9 Counter using T-flip-flop

Public

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4-bit Shift Register(SISO)

4-bit Shift Register(SISO)

Public

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Untitled

Untitled

Public

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decoder

decoder

Public

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Mux-based(Mine)

Mux-based(Mine)

Public

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MUX-based

MUX-based

Public

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OAI Circuit of 2X1 MUX using POS

OAI Circuit of 2X1 MUX using POS

Public

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Implementing Bit conversion from Decimal to given BCD(AOI)

Implementing Bit conversion from Decimal to given BCD(AOI)

Public

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Implementing Bit conversion from Decimal to given BCD(OAI)

Implementing Bit conversion from Decimal to given BCD(OAI)

Public

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Implementing Bit conversion from Decimal to given BCD(NAND)

Implementing Bit conversion from Decimal to given BCD(NAND)

Public

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Implementing Bit conversion from Decimal to given BCD(NOR)

Implementing Bit conversion from Decimal to given BCD(NOR)

Public

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CAT2. B2. Q2. Implement given sequential circuit

CAT2. B2. Q2. Implement given sequential circuit

Public

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CAT1. B1. Q2

CAT1. B1. Q2

Public

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CAT2. B2. Q5

CAT2. B2. Q5

Public

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CAT2. B2. Q2

CAT2. B2. Q2

Public

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CAT2. B2. Q3

CAT2. B2. Q3

Public

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Implementing Full Adder using Decoder

Implementing Full Adder using Decoder

Public

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Implementing bit-conversion using Multiplexor(8X1)

Implementing bit-conversion using Multiplexor(8X1)

Public

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CAT2. B2. Q4

CAT2. B2. Q4

Public

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CAT1. B2. Q5

CAT1. B2. Q5

Public

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Implementing Half-Adder using Decoder

Implementing Half-Adder using Decoder

Public

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