Task II Full Adder

Task II Half Subtrator

Task II Full Subtractor

Task II Half Adder

Task II Full Adder

Task II 4-Bit Adder

2X2 Multiplier

Task I FSOP form AOI

TASK I FPOS FORM OAI

TASK I FPOS FORM NAND

TASK I F'POS FORM NOR

hyrduc

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1Bit ALU

4 Bit ALU

2:1 MUX POS OAI

cat2 B1 q2

q2b1_2

Task 1 POS Active High Logic

Task 1 POS Active High Logic

Task 1 SOP Active High Logic

SIPO Shift Register

PIPO Shift Register

PIPO Shift Register

Bidirectional Shift Register

random counter

random counter

random counter

Mod N Counter

B1_Q2

B1_Q2

B1_Q2

Q5 B1

Q3 B2

2:1 MUX POS NOR

Task 1 Multiplexer

Full adder using 8:1 MUX

Half Adder using 4:1 MUX

Half Subtractor using 4:1 MUX

Full Adder Using 4:1 MUX

Full Subtractor using 4:1 MUX

Task 1 using 8:1 MUX

Full Subtractor using 8:1 MUX

Full Subtractor using 8:1 MUX

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Code Converter SOP

Code converter mux

DA QUES 3 DECODER

Code Converter Demux

Code Converter NAND

Code Converter NOR

Task 1 using 4:16 Decoder POS

Task 1 using decoder SOP

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Code converter POS

Binary to Gray code NAND

Binary to Gray code NOR

T3 Mux diagram for sop expression

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T3 2:1 Mux diagram for pos expression

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Decoder_TAsk 1

2:1 MUX POS OAI

HOT Q2

Q5 B2

Untitledcat2b2q3

SISO Shift Register

SISO Shift Register

Q3 B1

B1 Q1 C1

Q2 B1

Q1 B2

Q4 B2

Q4 B1