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Patel Anujkumar Amitbhai 22BCE2157

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Untitled

Untitled
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code_converter_1324_mux

code_converter_1324_mux
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code_converter_1324_decoder

code_converter_1324_decoder
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code_convertor_decoder

code_convertor_decoder
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full_subtractor

full_subtractor
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4-Bit Adder

4-Bit Adder
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4-Bit Adder

4-Bit Adder
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4-bit parallel adder/subtractor

4-bit parallel adder/subtractor
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4 BIT FULL ADDER

4 BIT FULL ADDER
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Untitled

Untitled
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4*4 Array Multiplier

4*4 Array Multiplier
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3X3 Multiplier

3X3 Multiplier
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Untitled

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half_adder

half_adder
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Full_adder

Full_adder
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Untitled

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Untitled

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POS_NOR

POS_NOR
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sop_nand

sop_nand
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UntitledCAT2B1Q3

UntitledCAT2B1Q3
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DSD_TASK2

DSD_TASK2
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Untitled

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16:1 MUX using 8:1 MUX

16:1 MUX using 8:1 MUX
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Untitled

Untitled
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8:1 MUX using 4:1 MUX & 2:1 MUX

8:1 MUX using 4:1 MUX & 2:1 MUX
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2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
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AOI logic circuit of 4:2 encoder

AOI logic circuit of 4:2 encoder
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1x16 decoder

1x16 decoder
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NAND logic circuit of 2:4 Decoder

NAND logic circuit of 2:4 Decoder
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Untitled

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Untitled

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Untitled

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Untitled

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4-bit binary Adder-Subtractor

4-bit binary Adder-Subtractor
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Untitled

Untitled
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CAT1 B1

CAT1 B1
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q1

q1
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q5

q5
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CAT1 B2

CAT1 B2
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4 Bit Binary Adder/Subtractor

4 Bit Binary Adder/Subtractor
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Untitled

Untitled
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ALU

ALU
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AOI logic circuit of 2:4 Decoder

AOI logic circuit of 2:4 Decoder
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UntitledCAT2B1Q5

UntitledCAT2B1Q5
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3 BIT MAGNITUDE COMPARATOR

3 BIT MAGNITUDE COMPARATOR
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Untitledcat2b2q1

Untitledcat2b2q1
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Untitledcat2b2q3

Untitledcat2b2q3
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Untitledcat2b2q4

Untitledcat2b2q4
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UntitledCAT2B2Q5

UntitledCAT2B2Q5
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SISO and SIPO

SISO and SIPO
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siso_sipo_shiftreg

siso_sipo_shiftreg
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PIPO

PIPO
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PISO SHIFT REGISTER

PISO SHIFT REGISTER
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pipo_piso_shiftreg

pipo_piso_shiftreg
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bidirectional shift register

bidirectional shift register
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bidirectional_shiftreg

bidirectional_shiftreg
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b1q1_1

b1q1_1
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q1b1_1

q1b1_1
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q4b1_1

q4b1_1
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q5b2_1

q5b2_1
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Untitled

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q2b2_1

q2b2_1
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q4b2_1

q4b2_1
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q2b2_1

q2b2_1
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q2b2_1

q2b2_1
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q5b2_1

q5b2_1
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Untitled

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Full adder using 2 pcs 8x1 multiplexer

Full adder using 2 pcs 8x1 multiplexer
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4x1 MUltiplexer Using 2x1 MUX

4x1 MUltiplexer Using 2x1 MUX
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Untitled

Untitled
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HALF ADDER USING MUX

HALF ADDER USING MUX
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Untitled

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Untitled

Untitled
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half subtractor using mux

half subtractor using mux
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full adder using decoder

full adder using decoder
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decoder

decoder
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Untitled

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8x1 multiplexer using two 4x1 and one 2x1

8x1 multiplexer using two 4x1 and one 2x1
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da q8 a

da q8 a
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INTERNALCIRCUITUSING2:1MUX

INTERNALCIRCUITUSING2:1MUX
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DAQ3SOP

DAQ3SOP
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Untitled

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seven segment dissplay using 16x1 mux

seven segment dissplay using 16x1 mux
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7 segment display using 8x1 mux

7 segment display using 8x1 mux
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q14_from_20que

q14_from_20que
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cat2q4b1

cat2q4b1
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2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
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Untitled

Untitled
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4-BIT BINARY SUBTRACTOR

4-BIT BINARY SUBTRACTOR
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4 bit binary subtractor

4 bit binary subtractor
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2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
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SOP canonical expression of MUX and circuit implemented in MUX

SOP canonical expression of MUX and circuit implemented in MUX
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Untitled

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Untitled

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Untitled

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INTERNALCIRCUITUSING4:1MUX

INTERNALCIRCUITUSING4:1MUX
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DAPOS

DAPOS
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Untitled

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7 segment display using 4:16 decoder

7 segment display using 4:16 decoder
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7 segment display using 1:16 demux

7 segment display using 1:16 demux
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seven segment

seven segment
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1:16sevensegment

1:16sevensegment
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Untitled

Untitled
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Untitled

Untitled
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Untitled

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Untitled

Untitled
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Untitled

Untitled
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Untitled

Untitled
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q10dacathode

q10dacathode
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seven

seven
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q8 da b

q8 da b
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Binary to 7 Segment

Binary to 7 Segment
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Untitled

Untitled
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4-BIT BINARY ADDER/SUBTRACTER

4-BIT BINARY ADDER/SUBTRACTER
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Untitled

Untitled
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code_convertor_nor

code_convertor_nor
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Full Subtractor using 3 to 8 Decoder

Full Subtractor using 3 to 8 Decoder
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code convertor_mux

code convertor_mux
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DE MTE

DE MTE
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booth multiplier

booth multiplier
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NAND logic circuit of 2:4 Decoder

NAND logic circuit of 2:4 Decoder
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NAND logic circuit of 4:2 encoder

NAND logic circuit of 4:2 encoder
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code_converter_1324_demux

code_converter_1324_demux
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POS canonical expression of MUX and circuit implemented in MUX

POS canonical expression of MUX and circuit implemented in MUX
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Half Adder Using 2x4 Decoder

Half Adder Using 2x4 Decoder
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full subtractor using mux

full subtractor using mux
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Untitled

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4 BIT BINARY SUBTRACTOR,4 BIT BINARY ADDER,4 BIT BINARY ADDER/SUBTRACTOR

4 BIT BINARY SUBTRACTOR,4 BIT BINARY ADDER,4 BIT BINARY ADDER/SUBTRACTOR
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BCD To Seven Segment Decoder Using Basic Logic Gates

BCD To Seven Segment Decoder Using Basic Logic Gates
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Untitled

Untitled
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7 segment display 1:16 demux using 1:8 demux

7 segment display 1:16 demux using 1:8 demux
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2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
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4 BIT ALU

4 BIT ALU
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Full Adder using 2, 4*1 MUX

Full Adder using 2, 4*1 MUX
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4 BIT ADDER and SUBTRACTOR

4 BIT ADDER and SUBTRACTOR
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