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Untitled
Untitledcode_converter_1324_mux
code_converter_1324_muxcode_converter_1324_decoder
code_converter_1324_decodercode_convertor_decoder
code_convertor_decoderfull_subtractor
full_subtractorUntitled
Untitled4-Bit Adder
4-Bit Adder4-Bit Adder
4-Bit Adder4-bit parallel adder/subtractor
4-bit parallel adder/subtractor4 BIT FULL ADDER
4 BIT FULL ADDERUntitled
Untitled4*4 Array Multiplier
4*4 Array Multiplier3X3 Multiplier
3X3 MultiplierUntitled
Untitledhalf_adder
half_adderFull_adder
Full_adderUntitled
UntitledUntitled
UntitledPOS_NOR
POS_NORsop_nand
sop_nandUntitledCAT2B1Q3
UntitledCAT2B1Q3DSD_TASK2
DSD_TASK2Untitled
Untitled16:1 MUX using 8:1 MUX
16:1 MUX using 8:1 MUXUntitled
Untitled8:1 MUX using 4:1 MUX & 2:1 MUX
8:1 MUX using 4:1 MUX & 2:1 MUX2:1 MUX Circuit using SOP Equation
2:1 MUX Circuit using SOP EquationAOI logic circuit of 4:2 encoder
AOI logic circuit of 4:2 encoder1x16 decoder
1x16 decoderNAND logic circuit of 2:4 Decoder
NAND logic circuit of 2:4 DecoderUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
UntitledCAT1 B1
CAT1 B1q1
q1Untitled
Untitledq5
q5CAT1 B2
CAT1 B24 Bit Binary Adder/Subtractor
4 Bit Binary Adder/SubtractorUntitled
UntitledALU
ALUAOI logic circuit of 2:4 Decoder
AOI logic circuit of 2:4 DecoderUntitledCAT2B1Q5
UntitledCAT2B1Q53 BIT MAGNITUDE COMPARATOR
3 BIT MAGNITUDE COMPARATORUntitledcat2b2q1
Untitledcat2b2q1Untitledcat2b2q3
Untitledcat2b2q3Untitledcat2b2q4
Untitledcat2b2q4UntitledCAT2B2Q5
UntitledCAT2B2Q5SISO and SIPO
SISO and SIPOsiso_sipo_shiftreg
siso_sipo_shiftregPISO SHIFT REGISTER
PISO SHIFT REGISTERUntitled
Untitledpipo_piso_shiftreg
pipo_piso_shiftregbidirectional shift register
bidirectional shift registerUntitled
Untitledbidirectional_shiftreg
bidirectional_shiftregUntitled
Untitledb1q1_1
b1q1_1q1b1_1
q1b1_1Untitled
Untitledq4b1_1
q4b1_1q5b2_1
q5b2_1Untitled
Untitledq2b2_1
q2b2_1q4b2_1
q4b2_1q2b2_1
q2b2_1q2b2_1
q2b2_1q5b2_1
q5b2_1Untitled
UntitledFull adder using 2 pcs 8x1 multiplexer
Full adder using 2 pcs 8x1 multiplexer4x1 MUltiplexer Using 2x1 MUX
4x1 MUltiplexer Using 2x1 MUXUntitled
UntitledHALF ADDER USING MUX
HALF ADDER USING MUXUntitled
UntitledUntitled
Untitledhalf subtractor using mux
half subtractor using muxfull adder using decoder
full adder using decoderdecoder
decoderSOP canonical expression of MUX and circuit implemented in MUX
SOP canonical expression of MUX and circuit implemented in MUXUntitled
UntitledUntitled
Untitled8x1 multiplexer using two 4x1 and one 2x1
8x1 multiplexer using two 4x1 and one 2x1da q8 a
da q8 aINTERNALCIRCUITUSING2:1MUX
INTERNALCIRCUITUSING2:1MUXDAQ3SOP
DAQ3SOPUntitled
Untitledseven segment dissplay using 16x1 mux
seven segment dissplay using 16x1 mux7 segment display using 8x1 mux
7 segment display using 8x1 muxq14_from_20que
q14_from_20quecat2q4b1
cat2q4b12:1 MUX Circuit using POS Equation
2:1 MUX Circuit using POS EquationUntitled
Untitled4-BIT BINARY SUBTRACTOR
4-BIT BINARY SUBTRACTOR4 bit binary subtractor
4 bit binary subtractor2:1 MUX Circuit using SOP Equation
2:1 MUX Circuit using SOP EquationUntitled
UntitledUntitled
UntitledUntitled
UntitledINTERNALCIRCUITUSING4:1MUX
INTERNALCIRCUITUSING4:1MUXDAPOS
DAPOSUntitled
Untitled7 segment display using 4:16 decoder
7 segment display using 4:16 decoder7 segment display using 1:16 demux
7 segment display using 1:16 demuxseven segment
seven segment1:16sevensegment
1:16sevensegmentUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
Untitledq10dacathode
q10dacathodeseven
sevenq8 da b
q8 da bBinary to 7 Segment
Binary to 7 SegmentUntitled
Untitled4-BIT BINARY ADDER/SUBTRACTER
4-BIT BINARY ADDER/SUBTRACTERUntitled
Untitledcode_convertor_nor
code_convertor_norFull Subtractor using 3 to 8 Decoder
Full Subtractor using 3 to 8 Decodercode convertor_mux
code convertor_muxDE MTE
DE MTEbooth multiplier
booth multiplierNAND logic circuit of 2:4 Decoder
NAND logic circuit of 2:4 DecoderNAND logic circuit of 4:2 encoder
NAND logic circuit of 4:2 encodercode_converter_1324_demux
code_converter_1324_demuxPOS canonical expression of MUX and circuit implemented in MUX
POS canonical expression of MUX and circuit implemented in MUXHalf Adder Using 2x4 Decoder
Half Adder Using 2x4 Decoderfull subtractor using mux
full subtractor using muxUntitled
Untitled4 BIT BINARY SUBTRACTOR,4 BIT BINARY ADDER,4 BIT BINARY ADDER/SUBTRACTOR
4 BIT BINARY SUBTRACTOR,4 BIT BINARY ADDER,4 BIT BINARY ADDER/SUBTRACTORBCD To Seven Segment Decoder Using Basic Logic Gates
BCD To Seven Segment Decoder Using Basic Logic GatesUntitled
Untitled7 segment display 1:16 demux using 1:8 demux
7 segment display 1:16 demux using 1:8 demux2:1 MUX Circuit using POS Equation
2:1 MUX Circuit using POS Equation4 BIT ALU
4 BIT ALUFull Adder using 2, 4*1 MUX
Full Adder using 2, 4*1 MUX4 BIT ADDER and SUBTRACTOR
4 BIT ADDER and SUBTRACTORPIPO
PIPO4-bit binary Adder-Subtractor
4-bit binary Adder-Subtractor