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FULL ADDER
FULL ADDERrealization of MUX using basic gates and XOR gate
realization of MUX using basic gates and XOR gateUntitled
Untitledall gates
all gatesAll gates projection
All gates projection2:1 MUX
2:1 MUX1:2 DEMUX using NAND only
1:2 DEMUX using NAND only4:1 MUX using NAND GATE
4:1 MUX using NAND GATEexp 4
exp 4Untitled
Untitledjk to d FLIPFLOP
jk to d FLIPFLOP