SHALINI SINGH - Circuits

SHALINI SINGH

Member since: 9 months

Educational Institution: Not Entered

Country: India

3 bit up counter

3 bit up counter

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3 BIT UP COUNTER

3 BIT UP COUNTER

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Y=(A+B'+C').(B+C').(A+B)

Y=(A+B'+C').(B+C').(A+B)

Public

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3 bit up counter

3 bit up counter

Public

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3 bit up counter

3 bit up counter

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LAB 3

LAB 3

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LAB 1

LAB 1

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LAB2

LAB2

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Half Subtractor using Nand gates

Half Subtractor using Nand gates

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HALF SUBTRACTOR USING EX-OR AND BASIC GATES

HALF SUBTRACTOR USING EX-OR AND BASIC GATES

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Untitled

Untitled

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1

1

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Untitled

Untitled

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Untitled

Untitled

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Untitled

Untitled

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Untitled

Untitled

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Untitled

Untitled

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Untitled

Untitled

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2-BIT DOWN COUNTER JK

2-BIT DOWN COUNTER JK

Public

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