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sameer project-1

Y=A.B'.C+A'.B.C'+C.A

HALF SUBTRACTER USING BASIC GATES

2:1 MULTIPLEXER USING LOGIC GATES

HALF ADDER USING BASIC GATES

HALF ADDER USING EX-OR AND BASIC GATES

HALF ADDER USING ONLY NAND GATES

FULL ADDER USING EX-OR AND BASIC GATES

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1:8 DE-MUX

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HALF SUBTRACTER USING NAND GATES ONLY

Full Subtarctor using NAND Gates only

Half Subtractor using EX-OR and Basic Gates

FULL ADDER USING NAND GATES ONLY

FULL SUBTRACTOR USING EXOR AND BASIC GATES

2:1 MUX

4:1 MUX

4:1 MUX(2)

8:1MUX f=m(0,2,4,6,7)

4:1MUX f=m(0,2,4,6,7)

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1:2 DE-MUX

4:1 MULTIPLEXER USING LOGIC GATES

Vaibhav kumar