3-Bit Down Counter Using JKFF

2-BIT up down counter using JKFF

Assignment

Serial In Serial Out Shift Register

Y=A.B'+A.B.C'+A.B

LAB3

Lab1

LAB-2

Half Subtractor Using Basic Gates

Half Subtractor EX-OR and Basic Gates

Full Subtractor Using NAND Gates Only

Half Adder using Basic Gates

Half adder using EXOR and Basic gates

Half adder using only NAND gates

Full adder using EX-OR and Basic gates

Full adder using NAND gates only

F=X.Z+X.Y+Y.Z

1:4 Multiplexer

1:4(1) DEMUX

1:8 DEMUX

1:8 DEMUX f=(0,2,3,4,6)

1:16 DEMUX F=(0,1,3,6,8,11,13,15)

2:1 Multiplexer Using Logic Gates

2-BIT UP COUNTER USING T FLIP FLOP

4:1 MULTIPLEXER USING LOGIC GATES

1:2 DE-MULTIPLEXER USING LOGIC GATES

4:1 MUX(2)

8:1 MUX f=m(0,2,4,6,7)

4:1 MUX f=m(0,2,4,6,7)

4:1 MUX f=m(1,2,3,5,6)

8:1 MUX f=m(1,2,3,5,6)

3-BIT UP COUNTER USING JK FLIP FLOP

8:1MUX

4:1 MUX(1)

2:1 MUX

2-BIT UP COUNTER USING D FLIP FLOP

2-BIT DOWN COUNTER USING JK FLIP FLOP

0->1->2->0 USING JH FLIP FLOP

Half Subtractor Using NAND Gates

Full Subtractor using EX-OR and Basic Gates

Y=A.B'+A.B.C'+A.B

LAB2-Level2

4-BIT UP COUNTER USING JK FF (ASYNCHRONOUS)

4-BIT DOWN COUNTER USING JK FF (ASYNCHRONOUS)

Serial In Parallel Out Shift Register

2-BIT UP COUNTER USING JK FLIP FLOP