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Rahul Sasikumar Menon

Member since: 1 year

Educational Institution: Not Entered

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EXPERIMENT 5 both level

EXPERIMENT 5 both level
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Tutorial

Tutorial
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AND gate

AND gate
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NOT gate

NOT gate
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exp1

exp1
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OR gate

OR gate
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NAND gate

NAND gate
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XNOR gate

XNOR gate
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XOR gate

XOR gate
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Untitled

Untitled
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Project 1 lvl 2 1

Project 1 lvl 2 1
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Untitled

Untitled
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Project1 lvl2 2

Project1 lvl2 2
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Project 1 lvl2 1

Project 1 lvl2 1
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Logic circuit of 2 to 1 multiplexer

Logic circuit of 2 to 1 multiplexer
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logic circuit of full multiplexer

logic circuit of full multiplexer
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demultiplexer

demultiplexer
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2-bit multiplexer

2-bit multiplexer
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exp3 lvl1

exp3 lvl1
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exp3 lvl2

exp3 lvl2
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Untitled

Untitled
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Last flipflop

Last flipflop
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TEST

TEST
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D to JK flipflop

D to JK flipflop
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JK to D flipflop

JK to D flipflop
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JK flipflop NAND gate

JK flipflop NAND gate
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Latches

Latches
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Flip Flops

Flip Flops
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4 Experiment Level 1

4 Experiment Level 1
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4 Experiment Level 2

4 Experiment Level 2
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Flip Flops

Flip Flops
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Flip Flops

Flip Flops
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3-Bit counter

3-Bit counter
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4-Bit counter

4-Bit counter
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AND gate

AND gate
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NOR gate

NOR gate
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Rahul Sasikumar Menon is not a collaborator of any project.

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